A Framework for Dynamic Energy Efficiency and Temperature Management (DEETM)

1. A Framework for Dynamic Energy Efficiency and Temperature Management (DEETM) Michael Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas University of Illinois at Urbana-Champaign http://iacoma.cs.uiuc.edu/flexram

2. Motivation • Increasingly high power consumption • High temperature • Inefficient use of energy • Limitations of existing approaches • Static optimizations • Coarse grain dynamic management (DPM) • Inefficient temperature control (sleep) • Independent targets: temp, energy efficiency Micro’33, Dec 2000

3. Goal • Temperature: enforce limit while minimizing slowdown • Energy efficiency: maximize energy saving while exploiting performance slack Unified framework for Dynamic Energy Efficiency and Temperature Management (DEETM) Micro’33, Dec 2000

4. Existing limitations: static application coarse grain dynamic inefficient techniques independent targets: temperature control energy efficiency DEETM approach: multiple techniques dynamic fine grain order techniques for maximum efficiency unified target Contribution: DTEEM Framework Micro’33, Dec 2000

5. DEETM Framework • Monitors temperature & execution slack • Runs decision algorithm periodically: {Thermal, Slack} components • Activates low-power techniques • dynamically • incrementally • in prioritized order Micro’33, Dec 2000

6. Techniques • Instruction filter cache • Data cache subbanking • Voltage scaling • Voltage scaling: DRAM only • Light sleep Micro’33, Dec 2000

7. Processor Processor Processor Processor High power mode: Time: 1 Energy: E High power mode: Time: 1 Energy: E Filter Cache Filter Cache Filter Cache Filter Cache Low power mode: Time: 1 + mr*1 Energy: e + mr*E Instruction Memory Instruction Memory Instruction Memory L1 Cache Instruction Filter Cache Micro’33, Dec 2000

8. Techniques • Instruction filter cache • Data cache subbanking • Voltage scaling • Voltage scaling: DRAM only • Light sleep Micro’33, Dec 2000

9. DRAM Bank Chip Environment • Processor-in-memory • 64 lean processors • 2-issue static • Optimized memory hierarchy • Integrated thermal sensors and instruction counter Interconnect DRAM Bank Processor Processor I-Cache D-Cache Instruction Memory Micro’33, Dec 2000

10. 1.6 Sleep MemVolt 1.5 VoltFreq SubBank 1.4 IFilter 1.3 Normalized Energy-Delay Product 1.2 1.1 1.0 0.9 0.8 0.7 0.5 0.6 0.7 0.8 0.9 1.0 Normalized Average Power Individual Techniques-E*D Micro’33, Dec 2000

11. VoltFreq 0.9 0.8 Normalized Energy-Delay Product 0.7 Gradual 0.6 IFilter 0.5 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 Normalized Average Power Combinations - E*D 1.0 Micro’33, Dec 2000

12. Summary • Techniques ordered by efficiency (same order apply to both targets) • System applies techniques in order, dynamically and incrementally Micro’33, Dec 2000

13. Thermal Algorithm Macrocycle Micro’33, Dec 2000

14. Temperature Control - Limit Micro’33, Dec 2000

15. Temperature Control - Slowdown Micro’33, Dec 2000

16. Slack Algorithm Macrocycle Microcycle The First Few Microcycles (HW) Every Macrocycle (HW/OS) Effective IPC*: frequency-adjusted Micro’33, Dec 2000

17. Slack - Energy Consumption Micro’33, Dec 2000

18. Slack Misprediction Micro’33, Dec 2000

19. Related Issues • Algorithm interaction • Selecting macrocycle • Handling Thermal Crisis situation • Reducing technique activation overhead • Flexible technique ordering • Hardware vs. software implementation Micro’33, Dec 2000

20. Conclusions • Effective & efficient temperature control • very few macrocycles still over limit • 27% longer execution vs. 98% (by sleeping) • Efficient & accurate fine-grain exploitation of execution slack • 5% slack  27% energy saved • small slack misprediction Micro’33, Dec 2000