Common Pixel Sensor Production

1. Common Pixel Sensor Production H. F.-W. Sadrozinski, Vitaliy Fadeyev SCIPP, UC Santa Cruz Hartmut Sadrozinski, SCIPP, UC Santa Cruz

2. Fluence in Proposed sATLAS Tracker Radial Distributionof Sensors determined by Occupancy < 2%, still emerging 5 - 10 x LHC Fluence Mix of n, p, pdepending on radius R LongStrips ShortStrips Strips damage largely due to neutrons Pixels ATLAS Radiation Taskforce http://atlas.web.cern.ch/Atlas/GROUPS/PHYSICS/RADIATION/RadiationTF_document.html Design fluences for sensors (includes 2x safety factor) :Innermost Pixel Layer (r=5cm): 1.4*1016 neq/cm2 712 MRad Outer Pixel Layers (r=11cm): 3.6*1015 neq/cm2 207 MRad Short strips (r=38cm): 6.8*1014 neq/cm2 30 MRad Long strips (r=85cm): 3.2*1014 neq/cm2 8.4 MRad Pixels Damage due to neutrons+pions Hartmut Sadrozinski, SCIPP, UC Santa Cruz

3. 2nd Pixel Layer 1rst Pixel Layer Pixel S/N -> Signal/Threshold Signal required with present Pixel ASIC (= 2 x In-time threshold): 3D 4E 11800 3E 10600 2E 8600e Planar Si 7600e Diamond 4600e Planar n-on-p adequate for all but innermost Pixel Layer -> start ATLAS project Meeting in Dortmund June 6&7, http://indico.cern.ch/conferenceDisplay.py?confId=34813 Need to optimize FEE Marginal performance for innermost Pixel Layer Hartmut Sadrozinski, SCIPP, UC Santa Cruz

4. Production of Si Strip Sensors on 6” wafers GLAST HPK 2000 p-on-n FZ Full-size & Q/C TS Main SSDs fully tested by HPK RD50 Micron 2006 p-on-n, n-on-n, n-on-p FZ & MCz, p-spray Test Structures (2D, Pixel, strips) only “No testing, best effort” Add mask set for backside processing ATLAS07 HPK 2007 n-on-p FZ, p-spray & P-stop Full-size & Technol. TS Main SSDs AND TSs fully tested by HPK! Prototype with HPK, Micron, ST Prototype with 4” suppliers Prototype with 4” and 6” wafers Hartmut Sadrozinski, SCIPP, UC Santa Cruz

5. Ideal Path to Fabrication of Planar Pixel Sensors • Specification of crucial properties which will apply to all manufacturers: • Collect electrons • 6 “ needed ? -> if yes, put into specs • Double-sided processing needed? -> if yes, put into specs • Define isolation (p-spray, p-stop) • Define biasing method, “bias dot” • Define bump pad pattern (we should get parts with old and new pixel layout to be flexible wrt FEE • Will we need “Active Edges”? If probability is high, add plasma etching to specs • Define extend of testing expected (I favor as much testing as one could expect since it gives feedback to the manufacturer. This does not mean single-pixel i-V!) • Define scope of proto-type and final Upgrade pixel production (# of wafers, etc) • Put together a layout of a few main sensors and many small test sensors • Request for Information (RFI) to all known manufacturers, request answers on • Interest • Technical ability • Production capacity for fabrication in 2 years • Testing facilities and manpower • Comments on specs, cost drivers • Request for Quote (RFQ) to (only select?) manufacturers • Only those with Interest, technical ability, production capacity for at least 30% of the upgrade planar pixels • Sufficient testing facilities and manpower Hartmut Sadrozinski, SCIPP, UC Santa Cruz

6. Path to Fabrication of Planar Pixel Sensors • My own private comments on a few commercial manufacturers (subject of RFI): • HPK said that they don’t like to do double-sided processing. Still true? • HPK does a stellar job on testing, one has to pay for it. It is worth it! • HPK has Q/A restrictions on wafers they will use. • HPK does own layout • Micron did minimal testing on RD50 wafers. • Micron has much experience in p-type and n-side, double-sided fabrication • Micron combines several different designs into one wafer • SINTEF is working on 3D with ATLAS, is developing expertise in plasma etching • CIS is developing a “multi-chip” wafer submission. • Projections of cost and comparisons of costs of different suppliers are complicated and should be handled with care (subject of RFQ). For example, RD50 ~ CHfr 4k per working wafer, 30 wafers delivered ATLAS ~ CHfr 3k per wafer (fully tested),132 wafers, pre-series of 15 wafers to test the masks Double-sided = 1.5 – 2 x single-sided? Hartmut Sadrozinski, SCIPP, UC Santa Cruz

7. Inactive Area ~1mm Micron 6” RD50 sensor (HPK very similar, but only one guard ring. Hartmut Sadrozinski, SCIPP, UC Santa Cruz

8. Number of Guard Rings Investigating the effect of guard rings for a given sensor and Vdep. Measure guard ring voltage (1 = closest to bias ring) Pre-rad (n-on-p) and post-rad (p-on-n): 8 guard rings might be necessary for 1000 V depletion. Will investigate systematically. Hartmut Sadrozinski, SCIPP, UC Santa Cruz

9. Edge Cut Quality ATLAS07 “Stealth”Laser GLAST Diamond saw Micron Unknown Digital inspection station, 500X . SEM, 180X Hartmut Sadrozinski, SCIPP, UC Santa Cruz

10. 34.8 37.5 34.8 Modules(From Maurice’s Dortmund talk ) • In mechanical studies and for initial discussions with IZM have been considering 4-chip modules: • No active edges needed (?) • Active fraction = 82% • Would be 87% with activeedge modules • Need 6” (?) Hartmut Sadrozinski, SCIPP, UC Santa Cruz

11. Realistic Near-term Plan for Planar Pixels • Start Submission with Micron (6”) together with UK (+other?, RD50?) groups to investigate outstanding technical issues • Few full-size sensors with old/new geometry, mostly test structures • Pixilated sensor test structures, but strip read-out because of DAQ • Size of Inactive area + Guard Rings -> Breakdown, Leakage current, charge collection efficiency • Investigating the guard rings effect/necessity, try to reduce inactive area to ~100’s of micron from ~1 mm now • On the first sight, we see no clear correlation between a cutting method and visual quality. This is to be confirmed and expanded! • However, the size of irregularities is typically small, <10 micron, except for the break line. • Starting a beam test program at ALS ( with M. Battaglia). Investigate efficiency as a function of distance from cut edge. • (One way to have smaller inactive area: thinner sensors?) • Biasing: • “Bias dot” on p-type material needs to be confirmed • Isolation: • P-spray good enough (is for short strips!) • Double-sided Processing • Needed because of guard rings? • Expensive/Exclusive • DAQ: • Available next year? ASIC availability. Useful for noise / beam test • Beam Test • Need high fluence proton (pion) data: Los Alamos Hartmut Sadrozinski, SCIPP, UC Santa Cruz