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Muon Phase II R&D WBS 5.5. V. Polychronakos Brookhaven National Laboratory May 7,2014. Some Background. U.S. Groups heavily involved in Phase I work Until late last year discussions about Phase II involvement were only over coffee or beer
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Muon Phase II R&D WBS 5.5 V. Polychronakos Brookhaven National Laboratory May 7,2014
Some Background • U.S. Groups heavily involved in Phase I work • Until late last year discussions about Phase II involvement were only over coffee or beer • Chamber Service Module (CSM)- obvious choice, did same for ATLAS Muons • Front End ASIC – U.S. expertise (MDT ASD, CSC ASD, MM/STG for Phase I) • We were asked by Management (prompted by P5) to come up with a plan within a week • Only possible credible proposal in such short time would be tasks similar to what we did for the current Experiment • Only U. Michigan and BNL expressed interest in specific work, although most other Muon Institutes reserved the option to get involved at a later time
Phase II Muon Upgrade/U.S. Interests • ATLAS Proposal (MDT) • Use MDT for L1 trigger to provide L1 trigger segment, angular resolution < 1mrad • Replace Mezzanine cards and CSMs • Expertise in US for current FE (Mezz, CSM) • US Muon Community is interested in designing & production of chips & FE • MRODs since GBT is foreseen to be used for new CSMs WBS 5.5.5 WBS 5.5.6 WBS 5.5.7
Description of tasks and requested support FY15-18 • FY15: 0.3 engineer. Study the readout and trigger data rates for both ASD/TDC and CSM, and estimate the buffer sizes needed. • FY16: 0.8 engineer. Study the FPGA radiation tolerance with test beams, define the specifications of the CSM board at high luminosity with MC simulations. • FY16: 0.4 ASIC designer for preliminary specifications and requirements • FY17: 0.8 engineer. Investigate the GBT system for mezzanine and CSM configurations and CSM readout, specify the format for trigger data sent to the L1 trigger, and develop a FPGA-version of the multiplexing algorithm. • FY17: 0.4 ASIC designer • FY18: 1 engineer. Design and build the first prototype of the CSM board, and build a MDT test station. • FY18: 1 ASIC designer, submit for fabrication first MDT specific ASIC design design
Muon Phase II R&D Proposed Budget Note: (1) U.S.ATLAS R&D program supported the early development of the Phase I ASIC which will form the basis of the MDT front end. Funding in FY14 was 355 k$
What we need to do (Srini’s/Abe’s Instructions) • For each WBS, the L2 manager identifies the institutes that will be involved. • Chuck will fill in the rate table for engineers, techs, etc. for that institute (assuming the rate today and scaling it for inflation) • Once the rate tables are filled, the L2 manager only needs to spell out how many FTEs of each engineers, tech, etc. are needed each year. If he does this, most of the calculation is automatically computed. • There is Travel and COLA, but I think at this point we assume some average for this rather than trying to figure out this in detail. There is always the contingency to cover any uncertainties. • Then there is M&S which has to be filled out. • The contingency is again based on what we did for P5.. I don't think we can do anything different.
Guidelines for Construction Estimatea Guidelines for Labor Estimate CONSTRUCTION WBS includes: • Procurement • Process control/QC • Preproduction • In-house fabrication • In-house testing • Radiation testing of production batches • Firmware But these are under M&O or R&D: • Monitoring software • Installation/integration • Beam tests and calibration studies