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Microelectronics User Group Meeting . TWEPP 2013, Perugia, IT 26/9/2013. Agenda. “News on foundry access services via CERN” by Kostas Kloukinas (CERN) ( 15’ ) “Status of 65nm technology access, distribution and IP block development . ”
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Microelectronics User Group Meeting TWEPP 2013, Perugia, IT 26/9/2013
Agenda • “News on foundry access services via CERN” by Kostas Kloukinas (CERN) (15’) • “Status of 65nm technology access, distribution and IP block development .” by SandroBonacini (CERN)(25’) • “Open Discussion” Kostas.Kloukinas@cern.ch
News on foundry access services via CERN Kostas Kloukinas TWEPP 2013, Perugia, IT 26/9/2013
Supported Technologies BiCMOS8WL-HPHigh Performance technology for demanding RF designs CMOS 8RF-DM Low cost technology for Analog & RF designs CMOS 8RF-LM Low cost technology for Large Digital designs CMOS 9SF LP/RF High performance technology for dense designs CMOS 6SF Legacy designs Active technology nodes: • Legacy technology: CMOS6SF 250nm • Mainstream technology: CMOS8RF 130nm • 95% of ASIC projects on DM variant • Advance technology: CMOS 65nm • For LHC upgrade applications. • Alternate technology: CMOS 130nm Foundry A 130nm CMOS 90nm CMOS 250nm CMOS CMOS 130nm Cost efficient technology for Analog & RF designs CMOS 65nm High performance technology for dense designs Foundry B 130nm CMOS 65nm CMOS Kostas.Kloukinas@cern.ch
Technical Support for Foundry A Foundry Physical IPvendors CAE Toolsvendors • Compiles and Distributes the 130nm Mixed Signal Design kit • Provide maintenance and technical support to the collaborating institutes. CERN CAE tools & technology support Cadence VCAD design services CERN designers External designers Kostas.Kloukinas@cern.ch
130 nm Mixed Signal Kit Distribution • Italy • INFN Rome • INFN Torino • INFN Bologna • INFN Bari • INFN Cagliari • Univ. of Bergamo • Univ. of Pisa • Univ. of Pavia • Polytecnico di Milano • US • Brookhaven Lab. • Columbia University • Fermilab • Lawrence Berkeley Lab. • Rutgers Univ. • Univ. of Chicago • Univ. of Hawaii • Univ. of Pennsylvania • Ohio State University • SMU,Dallas • Santa Cruz Institute • France • CEA SACLAY, Paris • IN2P3, Paris • LPNHE, Paris • IPNL, Lyon • IPHC, Strasbourg • LPSC, Grenoble • LAPP, Annecy • LPC, Clermont-Ferrand • CPPM, Marceille • INPG, Grenoble • Germany • BergischeUniversität Wuppertal • DESY, Hamburg • Institut der Universitaet Heidelberg • Max-Plank-Institute fur Physik • Max-Plank-Institute Halbleiterlabor • ForschungszentrumJulich • University of Siegen • Universität Bonn • UK • Rutherford Appleton Lab. • Imperial College London • University College London • Oxford University CERN • Portugal • INESC, Porto • LIP, Lisbon • Switzerland • Universite de Geneve • Spain • Univ. of Barcelona • IFAE, Barcelona • IFIC, Valencia • Netherlands • NIKEF, Amsterdam • Poland • AGH Univ. of Science & Tech. Kostas.Kloukinas@cern.ch
130nm Mixed Signal Design Kit • Mixed Signal Design kit in production: V1.8 • Release date: 10/6/2011 • Stable and fully functional. • No plans for foundry PDK releases in 2013 • Digital back-end physical implementation flow scripts need updates to ensure compatibility with newer versions of CAE tools. • Rad Tol. SRAM IP block available at CERN • Radiation Tolerant design, developed at CERN • 40MHz, Dual Port, synchronous design • SRAM generator developed at CERN • Contact CERN to access SRAM generation Kostas.Kloukinas@cern.ch
130nm Foundry Access Service CERN designers External designers CERN Foundry Services CERN organizes MPW runs among the collaborating institutes to help in keeping low the silicon prototyping costs. Foundry MOSIS Kostas.Kloukinas@cern.ch
130nm MPW activity • CERN participates on all MOSIS MPW runs (4 runs/year)and organizes ad-hoc MPWs directly with the foundry for high volume and/or area demanding designs • Prototyping and Engineering run costs are kept the same for the last 2 years. • Evolution of the Prototyping activity on CMOS8RF for the last 6 years • CMOS8RF-DM (3-2-3) is the dominant metal stack Kostas.Kloukinas@cern.ch
130nm CERN MPW in July 2013 test structures Design Project . TDCpix NA62 Gigatracker pixel readout ABC130_0 ATLAS Tracker Si-strip readoutABC130_1 >> Reticle Size: X= 19,120, Y=20,400 Chips per Wafer:60 Process Split MPW run Design process TDCpix no polyimide, ABC130_0 polyimide, ABC130_1 polyimide, Submitted in August 2013 Expected delivery in October 2013 ABC130_0 TOFPET CBC2 TDCpix ABC130_1 XFEL2 Kostas.Kloukinas@cern.ch
130nm Major Projects • Gigabit Transceiver Project (GBT) • “GBLD” Gigabit Laser Driver chip final version in 2012. • “GBT-TIA” Transimpedance Amplifier chip in 2010. • “GBTX”, Transceiver chip, first prototype in 2009, second prototype in 2012. • “GBT-SCA”, Slow Control Adapter, first prototype in 2013. • Design Projects for the XFEL Synchrotron facility • XFEL & DSSC ASIC designs • Prototype chips submitted in 2010, 2011, 2012. • DSSC full prototype submission scheduled for early 2014. • CBC: CMS Tracker Front-End ASIC • First prototype submitted in 2010 MPW. • Second prototype submitted in 2012 MPW. • S-Altro: ALICE TPC Readout ASIC • Submitted in 2010 on an MPW (24 wafers). • NA62 Pixel Gigatracker detector • Test chips prototyped in 2010. • First prototype submitted in 2013. Kostas.Kloukinas@cern.ch
130nm Major Projects • FE-I4_B: ATLAS PIXEL ‘b-layer upgrade’ • Engineering run (design area:19x20mm2) in 2010. • Production run of 96 wafers in 2012. • Post production order of 56 wafers in 2013. • MEDIPIX project • MEDIPIX3_V1: 12 wafers in 2009 • MEDIPIX3_V2: 12 wafers in 2010 • MEDIPIX_RX: 48 wafers in 2012 • TIMEPIX3: 1st prototype run in 2013 Medipix: Medical X-ray diagnosis with contrast enhancement and dose reduction Kostas.Kloukinas@cern.ch
Foundry Services News • Contract with Foundry A • Contract renewed for 3 years (2013-2015) • Same pricing conditions apply with some minor changes • Confidential Disclosure Agreement (CDA) with institutes will expire by the end of 2013 • Renewal procedure has startedInstitute signatory authorities are already contacted by e-mailACTION: verify that your institute has renewed the CDA with the foundry to maintain uninterrupted access to technology • Contract with Foundry B • Foundry access via an intermediary silicon broker • Contract preparation is in the final stage • Long procedures for negotiating technology information disclosure legal terms and contractual pricing conditions for prototyping and production services • Contract covers a period of 5 years (2013-2017) • More information on the next presentation by SandroBonacini. Kostas.Kloukinas@cern.ch
Foundry Services News • New member in CERN foundry services team: • GertOlesen • Responsible for coordinating all the logistics procedures (administrative, financial, handling) for the foundry access operations • Contacts at CERN for foundry services • GertOlesenGert.Olesen@cern.ch • Kostas Kloukinas Kostas.Kloukinas@cern.ch • Generic e-mail address: foundry.services@cern.chPlease use this address for foundry access requests Kostas.Kloukinas@cern.ch
MPW Call for Interest • Please contact for participation to: • Forthcoming MPW runs: • CMOS8RF (130nm) • MOSIS MPW, Nov. 18, 2012 • Inform CERN about your future submission plansas early as possible • For prototyping or small volume production • Indicate your request for special process options(passivation, C4 bumping, DM/LM metalization) • To help us plan ahead common MPW runs Kostas.Kloukinas@cern.ch
Thank You Kostas.Kloukinas@cern.ch