1 / 7

ECT 358

ECT 358. Lecture 12 Clock Generation. God plus one is always a majority!. If God be for us, who can be against us? Romans 8:31b. Clock Generation. Need a variable clock for the transmitter and receiver Consider developing a module that does the following: INPUT system clock

nara
Download Presentation

ECT 358

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. ECT 358 Lecture 12 Clock Generation

  2. God plus one is always a majority! If God be for us, who can be against us? Romans 8:31b

  3. Clock Generation • Need a variable clock for the transmitter and receiver • Consider developing a module that does the following: • INPUT • system clock • output frequency selection • OUTPUT • Transmitter • Bit Rate Clock • Receiver • Bit Rate Clock • Sampling Clock

  4. Clock Generation always @(posedge sys_clock) begin if (s_count == 0) begin sample_clock = !sample_clock; s_count = sample_count; end else s_count = s_count -1; if (b_count == 0) begin bit_clock = !bit_clock; b_count = bit_count; end else b_count = b_count -1; end

  5. Global Clock Access

  6. Global Clock Access • Global Clocks: • 4 total global clocks available through DLL’s • Phase 0, 90, 180, 270 • Outputs 2X or /2 • Lock Signal for DLL • Needs Feedback through ibufg or bufg in schematic

  7. Global Clock Access • BUFGDLL allows standard clock to be used • Simplest solution

More Related