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University Of Khartoum Faculty Of Engineering Electrical and Electronic Engineering

University Of Khartoum Faculty Of Engineering Electrical and Electronic Engineering. Microcontroller Lab. 3:. Analog to Digital Converter (ADC). In this session. Review the previous session (where are counters ?!). We will learn how to interface analog-signal devices.

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University Of Khartoum Faculty Of Engineering Electrical and Electronic Engineering

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  1. University Of Khartoum Faculty Of Engineering Electrical and Electronic Engineering Microcontroller Lab. 3: Analog to Digital Converter (ADC)

  2. In this session • Review the previous session (where are counters ?!). • We will learn how to interface analog-signal devices.

  3. 8-bit Timer/Counter Block Diagram

  4. Successive Approximation ADC

  5. Successive Approximation ADC • The successive approximation technique uses a DAC, a controller, and a comparator to perform the ADC process. • - Starting from the MSB down to the LSB, the controller turns on each bit at a time and generates an analog signal, with the help of the DAC, to be compared with the original input analog signal. • Based on the result of the comparison, the controller changes or leaves the current bit and turns on the next MSB. • The process continues until decisions are made for all available bits.

  6. ADC • The ADC is connected to an 8-channel Analog Multiplexer which allows 8 single-ended voltage inputs constructed from the pins of Port A. • Also supports 16 differential voltage with gain. • - Two of the differential inputs (ADC1, ADC0 and ADC3, ADC2) are equipped with a programmable gain stage, providing • amplification steps of 0 dB (1x), 20 dB (10x), or 46 dB (200x) on the differential input voltage before the A/D conversion.

  7. ADC • If differential channels are selected, the differential gain stage amplifies the voltage difference between the selected input channel pair by the selected gain factor. This amplified value then becomes the analog input to the ADC. • The ADC has a separate analog supply voltage pin, AVCC. • The voltage reference can be: • Internal reference voltages of nominally 2.56V or AVCC. • Externally decoupled at the AREF pin by a capacitor for better noise performance

  8. Analog to Digital Converter

  9. ADC • The ADC generates a 10-bit result which is presented in the ADC Data Registers, ADCH and ADCL. • By default, the result is presented right adjusted, but can optionally be presented left. • - If the result is left adjusted and no more than 8-bit precision is required, it is sufficient to read ADCH. Otherwise, ADCL must be read first, then ADCH. Once ADCL is read, ADC access to Data Registers is blocked. (why ??) • The ADC has its own interrupt which can be triggered when a conversion completes.

  10. ADC Conversion Result • For single ended conversion, the result is • If differential channels are used, the result is

  11. Any Questions

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