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University Of Khartoum Faculty Of Engineering Electrical and Electronic Engineering. Microcontroller Lab. 2:. Interrupts and Timers/Counters. In this session. Review the previous session. We will determine on 7-segmnts display and How to interface it using microcontroller.
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University Of Khartoum Faculty Of Engineering Electrical and Electronic Engineering Microcontroller Lab. 2: Interrupts and Timers/Counters
In this session • Review the previous session. • We will determine on 7-segmnts display and How to interface it using microcontroller. • How to make external interrupt. • How to use timers and counters.
Review • There are three registers associated with each port, name them and clarify their functions !! • How can we control switching high level-voltage devices like motors?
7-segments Display • A seven-segment display, or seven-segment indicator, is a form of electronic display device for displaying decimal numerals. • As its name indicates, is composed of seven elements individually on or off, they can be combined to produce simplified representations of the numerals.
7-segments Display • They are widely used in digital clocks, electronic meters, and other electronic devices for displaying numerical information.
7-segments Display • Basically there are two types of 7-Seg display's: • Common Cathode where all the segments share the same Cathode. • Common Anode where all Segments share the same Anode.
Interrupt Subsystem • A microcontroller normally executes instructions in an orderly fetch-decode-executesequence as dictated by a user-written program. • To enable the microcontroller to handle unscheduled, higher-priority events that might occur inside or outside the microcontroller, it must be equipped to interrupt subsystem.
Interrupt Subsystem • The external interrupts INT0, INT1, and INT2 trigger an interrupt within the ATmega32 when an external event of user-specified characteristics occurs at the pin associated with the specific interrupt. • The internal interrupts support the efficient operation of peripheral subsystems aboard the microcontroller.
Interrupt Subsystem • The external interrupts can be triggered by a falling or • rising edge or a low level. • Observe that, if enabled, the interrupts will trigger even if the INT0..2 pins are configured as outputs. This feature provides a way of generating a software interrupt.
Timer/Counter Subsystem • The Atmega 32 is packed with three timers for timing functionality as follows; • Two 8-Bit Timers (timer/counter0, timer/counter2) • One 16-bit timer (timer/counter1). • The number actually refers to the resolution of the timer/counter unit.
Timer/Counter Subsystem • Timer/Counter Register – TCNTn: • Is a 8/16-bits register have a feature of increment/ decrement its value according to clock with certain frequency ( works as Timer) or through output signal (works as Counter). • Output Compare Register OCRn: • Contains an 8/16-bits value that is continuously compared with the counter value (TCNTn). A match can be used to generate an output compare interrupt, or to generate a waveform output on the OC0 pin.
Clock Source • The Timer/Counter can be clocked internally, via the presaler, or by an external clock source on the Tn pin.
Timer/Counter Subsystem • When reaching max value; an overflow interrupt may be initiated, this interrupt is an internal interrupt in contrast to the second type of interrupts; external interrupt. • When issued, an interrupt service routine is initiated, Interrupt Service Routines (ISR) are functions that are executed in response to a hardware event rather than a function call embedded in the program. • Adjusting the overflow interrupt allows us to determine the function we want the MCU to perform upon timer/counter reaching max value.
Modes of operations • Normal Mode: • In this mode the counting direction is always up (incrementing), and no counter clear is performed. The counter simply overruns when it passes its maximum 8-bit value (TOP = 0xFF) and then restarts from the bottom (0x00). The output compare unit can be used to generate interrupts at some given time. • Clear Timer on Compare Match (CTC) Mode: • In CTC mode the counter is cleared to zero when the counter value (TCNTn) matches the OCRn.
Modes of operations • For generating a waveform output in CTC mode, the OC0 output can be set to toggle its logical level on each compare match by setting the Compare Output mode bits to toggle mode