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RICH LVL-1 status. Dead channel (60% of total channel in Run-2) Large offset on the bias voltage 70% of dead channel has offset(>200mV) Variation of bias voltage of the trigger output Dead line on the back plane or connector (5%) Broken amp on the LVL-1 board (15%)
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RICH LVL-1 status • Dead channel (60% of total channel in Run-2) • Large offset on the bias voltage • 70% of dead channel has offset(>200mV) • Variation of bias voltage of the trigger output • Dead line on the back plane or connector (5%) • Broken amp on the LVL-1 board (15%) • Still 10% of dead channel will be investigated
Hot channel • Hot channel(30% of total channels in Run-2) • Miss-resetting analog trigger signal • Critical voltage of ECL bias is a reason of miss-reset. • The voltage of ECL bias is different between on the test bench and on the AMU/ADC board • The resistor on the ECL bias should be changed. • In the chip test, • Noise have seen. • 5M Hz On the test bench On the board
Schedule • The Int-R chip test • Done. • We have 400 chips. • AMU/ADC Board • Add Capacitance and change register (by middle of September) • Install good chips and check outputs in BNL • By end of October • LVL-1 Board • Change Broken amp by end of September
Man power • Fukutaro Kajihara: 9/21-12/21 • Takao Sakaguchi: 9/22-10/12 • Kyoichiro Ozawa: 10/7-11/1, 11/10- • Soichiro Kametani: 10/7-11/31 • Koichi Kato: 11/7-1/10 • 3 Young Students: 11/10-1/15