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This paper discusses the problem of reconvergent fanouts in gate delay fault simulation, the analysis of ambiguity lists, fault detection thresholds, detection gaps, and presents the results and conclusions of the study.
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Analyzing Reconvergent Fanouts in Gate Delay Fault Simulation Hillary Grimes & Vishwani D. Agrawal Dept. of ECE, Auburn University Auburn, AL 36849
Outline • Problem Statement • Reconvergent Fanout Analysis • Ambiguity Lists • Fault Detection • Detection Threshold • Detection Gap • Results • Conclusion
Definitions • Gate Delay Fault Model • Assume that a delay fault is lumped at a single faulty gate • Detection Threshold • Minimum size delay fault that is guaranteed to be detected by the test • Detection Gap • Relates the detection threshold to the slack at the fault site
Problem Statement • When signals produced by a common fanout point reconverge, the inputs to the reconvergent gate are correlated • Conventional simulation ignores this correlation when bounded gate delays are used • Produces pessimistic results in both bounded delay simulation and gate delay fault simulation
Bounded Delay Simulation 0 1 3 3 5 1,3 1,3 1,3 1,2 4 11 1,2 1,2 2 5 1 1 3,4 1,3 1,3 1,3 5 9
Reconvergent Fanout Analysis Fall occurs at time ‘x’ Hazard cannot occur 0 1 x 3 3 5 1,3 1,3 1,3 1,2 4 6 11 1,2 1,2 x+1 5 1 1 3,4 1,3 1,3 1,3 Output rises at least 1 unit after ‘x’ 5 9
Ambiguity Lists • Ambiguity Lists generated at fanout points contain • originating fanout name • ambiguity interval – min and max delays from fanout to gate • Ambiguity list propagation is similar to fault list propagation in concurrent fault simulation
ITC-07 Paper 26.3 Ambiguity List Propagation • Ambiguity lists at the inputs of a reconvergent gate help determine its output • If signal correlations are such that no hazard can occur, the hazard is suppressed • Otherwise, the ambiguity lists are propagated to the gate’s output, and ambiguity intervals are updated
ITC-07 Paper 26.3 Ambiguity List Propagation • Bounded Delay Simulation • Ambiguity lists propagated through every gate • Detection Threshold Evaluation • Ambiguity Lists propagated through downcone of the fault site
Detection Threshold Ts = 12 Det. Threshold = 8 0 1 3 3 5 1,3 1,3 1,3 1,2 4 6 11 2 5 1,2 1,2 Corrected Det. Threshold = 6 1 1 3,4 1,3 1,3 1,3 5 9
Detection Gap for a Gate p1 - longest delay path through gate PI Ts PO p1 delay slack t gap Gate p2 delay DT(p2) p2 Ideal gate delay test should activate longest path p1, detection threshold = slack, gap = 0 A test that activates path p2, p2 < p1, gap = detection threshold – slack Smaller the gap, better is the test
Results • ISCAS85 benchmark circuits simulated with 10,000 random vectors • Simple wireload model • Bounded delays set to (3.5n ± 14%), where n is the number of fanouts • Program can accept any available gate delay data, which may be normally available from process technology characterization
Results: Fault-Free Simulation Using reconvergent fanout analysis generally results in larger EA and smaller LS values at outputs More apparent for circuits that contain a large number of reconvergent fanouts, such as in multiplier circuit c6288
Results: Fault Simulation • Average detection gap and fault coverage of faults detected with gap ≤3.5 recorded • For fault coverage, faults are counted as detected if they are detected: • Through the longest path through the gate • Through a path which is shorter than longest path by only one gate delay
Conclusion • When reconvergent fanout analysis is used, gate delay fault simulation results are less pessimistic • During simulation, ambiguity lists can grow quite large • Efficiency in list propagation needs to be improved • This min-max delay simulator has found application in hazard-free delay test generation