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MPC 555 QADC64 Analog-to-Digital Converter

MPC 555 QADC64 Analog-to-Digital Converter. MPC555 Block Diagram. How Do I Control These Modules?. These devices get their operating instructions through a set of registers The CPU can modify these registers through memory addresses “Memory-Mapped Registers” What do these registers do?

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MPC 555 QADC64 Analog-to-Digital Converter

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  1. MPC 555 QADC64Analog-to-Digital Converter

  2. MPC555 Block Diagram

  3. How Do I Control These Modules? • These devices get their operating instructions through a set of registers • The CPU can modify these registers through memory addresses • “Memory-Mapped Registers” • What do these registers do? • Where do I find them? • The Controller’s Users Manual is the definitive source!

  4. Internal Memory Map

  5. A Simple MMR-Driven Device Queued Analog-to-Digital Converter • Each QADC module includes: • 16 basic channels (internal multiplexing) • Direct external multiplexing support for up to 41 channels • 10-bit A-to-D conversion with programmable input sample time • 2 Conversion Command Queues to control operation • Prioritize and “program” the conversions • Queue complete (or paused) interrupt generation • Conversions can be initiated by: • External trigger (off of a pin) • Time intervals • Includes an internal PIT-like timer • Software command • Results of conversions are cached until the next queue run-through is complete. • Ability to use the channel pins as digital I/O ports

  6. Review: Successive Approximation Vref DAC Dout n control successive approximation register + _ Vin CLK • Binary search to match input voltage. • Conversion time > n times DAC settling time. • Input should stay stable throughout conversion.

  7. QADC Block Diagram

  8. The “Big Picture”

  9. Conversion Modes • Conversions can be: • Single-Scan (perform one pass of the queue) • Continuous-Scan (repeatedly pass through the queue) • Either of these can be initiated by: • External trigger pins • ETRIG[2:1] external pins can be flipped to start a conversion scan • Time intervals • Includes and internal PIT-like timer • Software command • Gives software full control over the samples

  10. Conversion Example (single-scan software-triggered) • Device: Thermocouple • A sensor which reports back temperature in the form of a voltage • Higher voltage  Higher temperature • System: • A device which, upon prompting of the user, will report the temperature • QADC Setup: • Single-scan mode • Connect the thermocouple to an input pin • Setup the command queue to read from the thermocouple’s pin • When the user asks, start the conversion by setting a register bit ( similar to PIT )

  11. Conversion Example (continuous-scan timer-triggered) • Device: Thermocouple • A sensor which reports back temperature in the form of a voltage • Higher voltage  Higher temperature • System: • A device which samples the temperature every X seconds and performs a system shutdown if it becomes higher than a certain threshold (safety sensor!) • QADC Setup: • Continuous-scan mode • Connect the thermocouple to an input pin • Setup the command queue to read from the thermocouple’s pin • Setup the QADC to generate an interrupt whenever a queue scan completes • Setup the QADC timer to start a scan every X seconds • Check the temperature in the Interrupt Handler

  12. MPC555 QADC Programming A number of different command registers used: • QADC64MCR: Module control reg – includes STOP, FRZ, SUPV • QADC64INT: Sets interrupt levels • DDRQ: Data Direction reg – configures the pins as inputs or outputs • QACR0: Control reg 0 – configures QCLK, MUXing, and HW triggers • QACR1: Control reg 1 – configures queue mode and int. enable • QACR2: same as QACR1, but for Queue 2 • QASR0: Queue Status reg – shows complete, overrun, current “PC” • PORTQA: Data port reg – used as direct digital I/O to the pins

  13. QADC Conversion Command Word Table (CCW) Essentially an “Instruction Memory” for the converter Each entry contains:

  14. Using the CCW and Getting Results The CCW is best accessed as a pointer/array, i.e. unsigned short * CCW_A = (unsigned short *) 0x304A00; … CCW_A[0] = (unsigned short) 0x00F9; CCW_A[1] = (unsigned short)0x003F; “End of Queue” On each scan pass-through, this queue will convert channel AN57 using QCLK period x 16 sample time, then stop.

  15. Using the CCW and Getting Results The results of the conversion are stored in a similar memory structure, which can be read using 3 different addresses, depending on desired alignment. • RJURR: Right-Justified Unsigned Result Register • 10-bit result – right-justified (bits 6-15) • LJURR: Left-Justified Unsigned Result Register • 10-bit result – left-justified (bits 0-9) • LJSRR: Left-Justified Signed Result Register • 10-bit result – left-justified, with bit 0 being inverted

  16. Using the CCW and Getting Results You can also access the result queue as a pointer/array The result of each scan in the CCW will show up in the corresponding entry of the result arrays. (parallel array structure) From the example earlier: You can get the result of the analog scan at offset 0 from the result reg pointer value = QADC_RJURR[0];

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