Magnetic RAM at Freescale Semiconductor: Research to Production

1. Magnetic RAM at Freescale Semiconductor:Research to Production Jeff Smith 11/4/05

2. Outline • Overview of Freescale Semiconductor • Need to be filled: System on a Chip • Market for the product • General principles of MRAM design and manufacturing • What is MRAM? How does MRAM work? • Manufacturing MRAM. What new challenges exist? • Bringing MRAM from lab to fab • Disruptive technology • 30 years of progress! • Manufacturing MRAM • Role of intellectual property

3. Freescale Semiconductor Freescale Semiconductor is a leading global semiconductor company focused on providing embedded processing and connectivity products to large, high-growth markets. We are dedicated to our customers and their success.

4. Freescale SemiconductorEmbedded Leadership Networking Transportation #1 Automotive ICs Gartner Dataquest #2 MicrocontrollersGartner Dataquest #1 Comm ProcessorsInternational Data Corporation (IDC) #1 RF Power Products for Cellular Base Station Allied Business Intelligence #4 Wireless Comm. Application-specific Standard ProductsGartner Dataquest Wireless Standard Products

5. Freescale’s Chandler Fab East Fab South Fab North Fab Office Area Freescale’s Chandler Fab site, Chandler, Arizona

6. Site & Chandler Fab Facts Site/Factory Details: • 80 acre site including Chandler Fab, ePM, MBU’s, Support Organizations • 130K square feet fab area • 70K square feet probe/test area • 1.2M square feet building space • 200 mm wafer suze • Print Capability to 130 nm • Site Census: ~2200 • Chandler Fab Capacity: 7000 wafers/week • Factory maximum 4 wall (build out) capacity for manufacturing up to 10K wafers/week • Fab Construction: Bay/Chase layout. N/S Fab have two levels with air return in Sub Fab and U-Channels. East Fab has raised floor

7. System control and functionality Requirements special function processor Program and data storage NVM(program) general purpose processor System Design DRAM IP Creation processor bus DMA bus interface Interaction with other systems NVM(data) SoC Integration peripheral bus Interaction with real world communications peripherals customer specific Fabrication Analog / Mixed signal Qualification Device Drivers APIs SoC Applications System On a Chip a Product … and a Process. Solutions targeted toward specific applications that implement entire systems • System to Silicon in a rapid time-to-market

8. System On a Chip: Impact of Memory Embedded Memory Increasingly Dominates Chip Area for SoC % of Die Area Embedded Memory becomes a Key Differentiator in Technology Offerings

9. The Memory Market • Memory is overtaking logic as the largest part in an electronic system • Growth of data storage, portable devices, automotive electronics leading to new memory requirements • Traditional $30 billion computer memory market is stabilizing • Emerging markets and embedded memories are creating new opportunities • There are competing approaches to future memory technologies

10. Embedded Memory Markets • Consumer • A/V • 128KB SRAM • 200MHz • 0C- 85C • Gaming • 128KB Cache SRAM • 4MB eDRAM • 1GHz • Smartcards • 128kB EEPROM • 40MHz • Automotive • Powertrain Control • 128KB SRAM • 4MB Flash • 200MHz • -40C-150C • Chassis and Safety • 32KB SRAM • 1MB Flash • 100MHz • Factors • Cost • Density • Speed • Temp • Power • Volatility • Mobile • Wireless Handsets • 1MB SRAM • 64KB Cache SRAM • 400MHz • Personal Assistants • 512KB SRAM • 1MB ROM • 200MHz • Networking • Routing • 4MB SRAM • 800MHz • Configurable • 128KB Cache SRAM • Flash-FPGA • 600MHz

11. MRAM: What is it? • MRAM offers multiple memory capabilities that are currently realized by separate memories = universal memory • There are many benefits! • Memory is non-volatile • It does not require high voltage programming as does flash memory. • It will substantially reduce battery requirements, since it does not require constant refreshing as does DRAM. • It offers instant-on capability, eliminating boot up times for computers, cell phones and other devices. • It can be easily integrated with current chips, reducing the cost of multi-chip applications, and improving the speed of operation. • Speed is comparable to all but the fastest SRAM • Bit cell size is competitive with DRAM • Read cycle is non-destructive- nearly infinite

12. What is MRAM? How it works MRAM stores information using the magnetic polarity of a thin, ferromagnetic layer. Information is read by measuring current or resistance across the MRAM stack. Current is determined by the rate of electron quantum tunneling, which is affected by magnetic polarity of the cell. The “Free Layer” polarization is allowed to change, depending on if the cell is High or Low The resistance across the stack is measured to determine the cell state

13. What is MRAM? How it works Slaughter, CNS Symposium, 2004.

14. What is MRAM? How it works The use of cladding has reduced the current necessary to create fields to program the array.

15. Manufacturing MRAM

16. Metal 5 BL MRAM Module MTJ TE Metal 4 DL BVia M3 Via2 Front End 0.18 m CMOS M2 Via1 M1 Bit Cell Manufacturing MRAM: MRAM 4 Mb bit cell

17. Manufacturing MRAM: Lab/Fab approach Considerations for manufacturing: • Lowest cost options • Limit risk • Fastest time to market Freescale has used a LAB-FAB approach to achieve these goals. Development is performed in a high-volume manufacturing facility

18. Manufacturing MRAM Lowest Cost Options Leverage common tools: Use standard manufacturing equipment Re-use existing process engineering and service knowledge Reduce spares, leverage relationships with suppliers Achieve volume discounts through Purchasing Use existing equipment: Did not need new steppers, metrology, defect inspection Reduces capital expenses and depreciation Limit risk With some exceptions, most equipment can be redeployed if the program is cancelled.

19. Manufacturing MRAM Fastest time to market using existing fab resources Much of the equipment for the process flow was already installed Silicon management processes from the factory were re-used Statistical Process Control procedures were re-used Project management techniques were used to speed the process Research of the tunnel junction Development of bitcell Integration of modules Manufacturing of pre-production samples in 2004-2005 (4Mb) Full scale product in 2006.

20. Manufacturing MRAM Technical Hurdle: example: Temperature stability of magnetics Manufacture of MRAM is performed on standard CMOS Issue: magnetic materials are temperature sensitive Most metallization processes are performed between 300C and 400C. deposition of dielectrics deposition of metal etch of metal and dielectrics removal of etch byproduct anneal of metal layers New processes had to be engineered to make the process work For example: Aluminum oxide tunnel junction formation Creation of interconnects following MTJ formation

21. Manufacturing MRAM Technical Hurdle: example: cross contamination control MRAM is manufactured in a high volume CMOS wafer fab Issue: magnetic materials are not compatible with CMOS manufacturing MRAM bitcells contain materials such as Nickel Cobalt Iron Platinum Manganese Ruthenium Trace contaminants such as these can affect yield or reliability of production CMOS. Special cleaning procedures were used when processing MRAM wafers on production equipment. Color-coded boxes alerted technicians to MRAM wafers. A contamination control strike team was assembled in case of escape.

22. Bringing MRAM from Lab to Fab MRAM is a disruptive technology Disruptive technologies provide higher margins for a successful company through differentiated products or A company’s position in the market may be permanently damaged or eliminated. Unfortunately, you can never know what is truly disruptive It has taken nearly 30 years to bring this technology to market!

23. DRAM Density MRAM Density Density (Kb) 8 10 6 10 4 10 100 1 1960 1970 1980 1990 2000 2010 Emergence of New Technology: MRAM vs. DRAM People will doubt that you can get there! You have to find ways to pay the bills and encourage industry adoption before total disruption can occur  Get in the market! 2002: 256Kb on 0.6um CMOS 2005: 4Mb on 0.18um 2006?: 64Mb on 0.09um How has Freescale tried to get in the market?

24. MRAM: Role of Intellectual Property Freescale has a vigorous effort to establish its intellectual property rights Companies have been set up as “IP houses” to establish a set of patents for licensing revenue. See for example, NVE of Eden Prairie, MN. We have 3 differentiating patents: • Integration with interconnect: MRAM bitcells are inserted between Metal4 and Metal5. • Magnetic stack materials and processes • “Savtchenko Switching”: Named one of 5 “Killer Patents” by MIT’s Technology Review in 2004.

25. MRAM: Role of Intellectual Property • Savtchenko Switching: Toggle Bit Use of a Synthetic Anti-Ferromagnet (SAF) is a key differentiator in the MRAM market. US Patent6,545,906 M1 M1 = M2 AF coupling M2 H> Hflop H< Hflop SAF can lower total energy by “flopping” and scissoring.

26. Hard Axis Easy Axis Write Line 1 (H1) Write Line 2 (H2) MRAM: Role of Intellectual Property • Balanced SAF free-layer • Bit oriented 45º to lines • Unipolar currents • Overlapping pulse sequence • Must read and “decide” prior to writing

27. H H 2 2 I I 2 2 I I H H 1 1 1 1 MRAM: Role of Intellectual Property Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Easy Easy Easy Easy Easy Easy Easy Easy Easy Easy Easy Easy Easy Easy Easy Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Write Line 1 Write Line 1 Write Line 1 Write Line 1 WriteLine1 Write Line 2 Write Line 2 Write Line 2 Write Line 2 Write Line 2 Write Line 1 On Off On Write Line 2 Off t2 t1 t3 t4 t0 Current pulses are applied in a 4 cycle sequence to rotate the tri-layer stack by 180 degrees from its initial state. A pre-write read is necessary to ensure correct final state.

28. MRAM: Role of Intellectual Property • The novel switching mode results in a robust write mode: Virtually no “disturbs”. • Design and layout of 45 degree bit results in higher memory densities • Other designs lose effectiveness below 0.18um • Lower current densities are necessary for writing, resulting in lower power requirements • Symmetric read and write with an access time of 25ns achieved.

29. MRAM: Role of Intellectual Property There are 3 main companies pursuing MRAM: Freescale Semiconductor We have sampled 4Mb parts to customers, production in 2006 Parts are in “Technology Qualification” now Extended life testing, for example Printer memories, battery backed up SRAM, Gameboys Cypress Semiconductor and NVE Developing a 64Kb array, higher voltages, slower parts Cypress has spun off their MRAM business Different applications than Freescale Altrus: IBM and Infineon joint venture Have demonstrated 16Mb part on 0.18um CMOS We think Altrus is 1 year behind Freescale

30. Bringing MRAM from Lab to Fab Summary MRAM can be a universal memory for next generation semiconductor applications A Lab/Fab manufacturing strategy has been successful for Freescale Low cost Fast time to market Limit risk to the company Evolutionary and Disruptive technologies follow different paths Evolutionary: Everyone has the roadmap Disruptive: No one knows what’s going to happen! We still do not know the final role of MRAM in the marketplace Intellectual Property plays a key role in achieving market leadership Savtchenko Switching is an example of a “Killer Patent.”