Course Tutor Dr R E Hurley

1. Semiconductor Device and Processing Technology Course Tutor Dr R E Hurley Northern Ireland Semiconductor Research Centre School of Electrical & Electronic Engineering The Queen’s University of Belfast

2. Semiconductor Device and Processing Technology 8. SOI What is it? History What’s it used for? Description How to make it Wafer bonding Silicon Insulator Substrate

3. SOI Technology • The substrate is a thin silicon layer on a thin insulator layer on a silicon substrate. • Reduces parasitic capacitance (higher speed 15%, lower power -20% than equivalent bulk CMOS) • Reduces probability for ‘latch-up’ from radiation (isolation of n and p wells) • Insulator is oxide for CMOS and sapphire for radiation-sensitive devices (e.g. cosmic rays) • First commercial SOI by IBM 1998

4. Methods of manufacture • SIMOX. (Heavy dose implanted oxygen makes an oxide layer) • Wafer bonding to an oxidised substrate. (splitting away a thin top layer of silicon with wafer splitting) Wafer Bonding Top wafer is ‘wasted’ by grinding, etching and polishing ‘Smart-cut’. Hydrogen implanted and expanded by heating. Porous silicon grown and split by water jets Stress at interface of Si and SiGe layer.

5. SIMOX Si is simply implanted with a large quantity of oxygen! (You can buy this from China)

6. BESOI (bond and etched back SOI) Wasted Wafer is bonded to an oxidised wafer and the top ground mechanically away and etched and polished.

7. Smart Cut Technology has 5 key steps • Hydrogen implantation into the active wafer • Hydrophilic wafer bonding • Low T thermal anneal for splitting • High T anneal for bond strength • Final touch polish

8. SMART-CUT • Damage

9. Smart-cut process 3 1 2 4

10. Annealing at 5000C → expanding hydrogen → cracks Examples of cracks appearing along line of H or He implant

11. Higher temperature anneals with He produce rows of bubbles Annealing ~ 8000C

12. E = 160keV Dose = 6 x 1016 cm-2 Oxygen plasma pre-clean Results – GOOD and BAD GOOD • Particle voids → defects • The oxygen plasma activation is undertaken in an RIE system which creates particle contamination. This is difficult to remove without reducing bond energy.

13. Scanning electron microscope (SEM) of SOI Si on SiO2 on silicon

14. Smart Cut SOI Final success! • Hydrogen implant 100keV and 6x1016cm-2 • Oxygen plasma and short MSC1 clean • Ramp up to 400°C • Successful Smart-Cut SOI – i.e. NO VOIDS!

15. Importance of wafer bonding for SOI To produce quality SOI requires: First Class Bonding Technology!

16. Wafer bonding – process flow Commercial systems now use vacuum for bonding ? 12 hrs In clean air at atmosphere QUB uses ultra-sonic bath (0.01–0.02:1:5 NH4OH:H2O2:H2O, 550C, 20 min) Cleaning is the key to good bonding!

17. Requirements for a good bond • Flatness – only 1 – 3 µm required (wafer will bend!) • Micro-roughness < 0.5 nanometres needed. • Cleanliness – no dust, hair, fibres! No organics. (hydrocarbons). No metal ions. • Class 10 cleanroom or better.

18. Good bond needs cleanliness! Particle 1µm dia. • Small particle produce large voids Void 1 cm !! wide • Organics outgass during annealing • Metal ions affect electrical properties of devices

19. Model of the bonding process Hydrophobic – wafer repels water Hydrophilic – wafer attracts water. Hydrophilic bonding – wafer has surface layer of oxide Wafer surface are terminated by OH groups after RCA clean (NH4OH:H2O2:H2O) Stage 1 Water fills out gaps up to 6Å and forms Van de Waals and H bonds

20. Model of the bonding process Stage 2 110 -1500C Interface water is removed, silanol (Si-OH) groups approach

21. Model of the bonding process Stage 3 150 - 8000C • AT 8000C all water is driven out and covalent Si-O-Si bonds formed. Full strength only achieved at 11000C • This is a problem where temperature must be limited (4500C, if circuit elements present)

22. Low temperature bonding Bonding silicon to glass at < 5000C Parameters: Temperature, bias voltage, time.

23. Low temperature bonding Plasma bonding: The bond strength annealing at < 500C is excellent, but particles are a big problem from plasma reactor. Oxygen plasma: 30secs only at 200W power. 45 secs only in RCA1. Dry, anneal at < 500C + good housekeeping!

24. Problems of plasma bonding Plasma bonding: early attempts. Some poor results from another University in 2002 Water vapour believed to be trapped in rough surface produced by plasma bombardment.

25. Key to good SOI is good bond strength Measure bond strength by inserting a blade between wafers and measure crack propagation length using IR light. Imaging Blade Infra-red (IR) light Surface energy, γ = 3Etw3tb2/(32L4) mJ/ m2 E is Youngs Modulus

26. Measuring bond strength View on screen from above wafer Surface energy, γ = 3Etw3tb2/(32L4) mJ/ m2 E is Youngs Modulus

27. Bonding for micromechanics integrated with microelectronics CMOS integrated with accelerometer, Sanz-Velasco, 2002 Micromachinedthruster module for space applications. 5 bonded wafers, 7 components

28. QUB Diode [silicon on silicide on insulator (SSOI)] Schematic cross-section of Schottky diode on SSOI

29. LPCVD oxide Fabrication of silicon on silicide on insulator, (SSOI) Rp Active Si wafer LPCVD WSi Poly-Si Oxide polish Ion implantation SiO2 deposition and rim etch Handle Si wafer

30. Fabrication of silicon on silicide on insulator, (SSOI) silicon silicide oxide Handle wafer • SSOI has all the advantages of SOI • SSOI gives low resistance buried collector technology • Silicide in SSOI can act as a high diffusivity channel for dopants

31. SEM image of SSOI Si on WSi2 on SiO2

32. Ultra-thin SSOI substrate (<100 nm) Present work is combining Smart Cut technology with SSOI to produce ultra thin silicon on silicide silicon silicide oxide Handle wafer

33. Examples of SOI – thin film and ultra thin film Thin-film SOI: Tsi < 0.5µmPartially-depleted transistors (PD) Ultra-thin film SOI: Tsi < 50nmFully-depleted transistors (FD)

34. Low energy effects in ultra-thin smart-cut applications