DC and RF Modeling of CMOS Schottky Diodes

1. DC and RF Modeling ofCMOS Schottky Diodes Wenyuan Zhang, Yang Tang and Yan Wang Tsinghua University June 21st 2019

2. Outline • Motivation • Model Description • Parameter Extraction • Model Validation • Model Scalability • Discussion • Conclusion

3. Motivation [1] W. Zhang and Y. Wang, International Applied Computational Electromagnetics Society Symposium, p. 1-2 (2017). [2] S. Sankaran and K. K. O, IEEE Electron Device Letters, v. 26, n. 7, p. 492-494 (2005). [3] S. Sankaran et al., IEEE International Solid-State Circuits Conference, p. 202-203, 203a (2009). [4] M. K. Matters-Kammerer et al., IEEE Transactions on Electron Devices, v. 57, n. 5, p. 1063-1068 (2010). [5] E. Seok et al., Symposium on VLSI Circuits, p. 142-143 (2006). [6] R. Han et al., IEEE Journal of Solid-State Circuits, v. 48, n. 10, p. 2296-2308 (2013). • CMOS Schottky diodes • They have attracted great interests in the field of mm-wave and THz detecting and imaging [1]. • A number of researches have been conducted on their structures [2], [3], characterization [4] and circuit applications [5], [6].

4. Motivation [2] S. Sankaran and K. K. O, IEEE Electron Device Letters, v. 26, n. 7, p. 492-494 (2005). [3] S. Sankaran et al., IEEE International Solid-State Circuits Conference, p. 202-203, 203a (2009). CMOS Schottky diodes: structures

5. Motivation [5] E. Seok et al., Symposium on VLSI Circuits, p. 142-143 (2006). [6] R. Han et al., IEEE Journal of Solid-State Circuits, v. 48, n. 10, p. 2296-2308 (2013). [7] R. Han et al., IEEE Journal of Solid-State Circuits, v. 46, n. 11, p. 2602-2612 (2011). CMOS Schottky diodes: applications in imaging systems

6. Motivation [1] W. Zhang and Y. Wang, International Applied Computational Electromagnetics Society Symposium, p. 1-2 (2017). [2] S. Sankaran and K. K. O, IEEE Electron Device Letters, v. 26, n. 7, p. 492-494 (2005). [3] S. Sankaran et al., IEEE International Solid-State Circuits Conference, p. 202-203, 203a (2009). [4] M. K. Matters-Kammerer et al., IEEE Transactions on Electron Devices, v. 57, n. 5, p. 1063-1068 (2010). [5] E. Seok et al., Symposium on VLSI Circuits, p. 142-143 (2006). [6] R. Han et al., IEEE Journal of Solid-State Circuits, v. 48, n. 10, p. 2296-2308 (2013). • CMOS Schottky diodes • They have attracted great interests in the field of millimeter-wave and terahertz detecting and imaging [1]. • A number of researches have been conducted on their structures [2], [3], characterization [4] and circuit applications [5], [6]. • Their modeling is far below expectations and severely limits the development of their circuit applications.

7. Outline • Motivation • Model Description • Parameter Extraction • Model Validation • Model Scalability • Discussion • Conclusion

8. Model Description Vj Vs V • DC model • Thermionic emission • Carrier velocity saturation • Tunneling • Complete model

9. Model Description • RF model • Junction capacitance Cj • Barrier capacitance • Diffusion capacitance • Stray capacitance Cp andstray resistance Rp • Coupling influences between electrodes • Stray inductance Ls • Parasitic interconnect influences

10. Outline • Motivation • Model Description • Parameter Extraction • Model Validation • Model Scalability • Discussion • Conclusion

11. Parameter Extraction • DC extraction • 1. Extract Is and n at small forward bias • 2. Extract Rs0, Im, Vm and nm at large forward bias • 3. Extract It and nt at reverse bias

12. Parameter Extraction • RF extraction • 4. Extract Ls at small forward bias at high frequency • 5. Extract Nd, Vbi and Cp at reverse bias at low frequency • 6. Extract Rp at reverse bias at high frequency

13. Outline • Motivation • Model Description • Parameter Extraction • Model Validation • Model Scalability • Discussion • Conclusion

14. Model Validation • Schottky diodes • Fabricated in 65nm and 130nm CMOS • Measured up to 67GHz • Modeling root-mean-square errors < 5%

15. Model Validation • DC forward characteristics Fig. Measured (red) and modeled (blue) DC characteristics of a single-cell diode in 65nm CMOS, with 0.92μm2Schottky contact area. Results given by Schottky equation (black) are also given. (a) Forward I-V. (b) Forward R-V. (c) Reverse I-V. (d) Reverse R-V.

16. Model Validation • DC reverse characteristics Fig. Measured (red) and modeled (blue) DC characteristics of a single-cell diode in 65nm CMOS, with 0.92μm2Schottky contact area. Results given by Schottky equation (black) are also given. (a) Forward I-V. (b) Forward R-V. (c) Reverse I-V. (d) Reverse R-V.

17. Model Validation • RF characteristics Fig. Measured (red) and modeled (blue) RF characteristics of a single-cell diode in 65nm CMOS, with 0.92μm2Schottky contact area. (a) Ctotal=Im(Y)/ω versus bias at different frequencies. (b) Ctotal versus frequency at different biases (from -1.1V to 0.1V, 0.1V step).

18. Outline • Motivation • Model Description • Parameter Extraction • Model Validation • Model Scalability • Discussion • Conclusion

19. Model Scalability • Scaling relations • N: the number of diode cells • A: the area of Schottky contact • Cut-off frequencies • ~2THz in 65nm CMOS • ~1THz in 130nm CMOS

20. Model Scalability • Scalability with the number of diode cells Fig. Model scalability with the number of diode cells in 65nm CMOS. Schottky contact area of a single cell is 0.185μm2.

21. Model Scalability • Scalability with the area of Schottky contact Fig. Model scalability with the area of Schottky contact in 65nm CMOS. Devices under test are single-cell diodes.

22. Outline • Motivation • Model Description • Parameter Extraction • Model Validation • Model Scalability • Discussion • Conclusion

23. Discussion [8] L. F. Feng et al., Appl. Phys. Lett., vol. 101, no. 23, pp. 233506-1–233506-4, Dec. 2012. [9] K. Bansal et al., Appl. Phys. Lett., vol. 105, no. 12, pp. 123503-1–123503-4, Sep. 2014. [10] D. Korucu et al., J. Optoelectron. Adv. Mater., vol. 11, no. 2, pp. 192–196, Feb. 2009. [11] W. Yang et al., Phys. Status Solidi, vol. 11, no. 3–4, pp. 714–717, Apr. 2014. [12] P. Chattopadhyay and D. P. Haldar, Appl. Surf. Sci., vol. 171, no. 3–4, pp. 207–212, Feb. 2001. • On forward capacitance • Abnormal decreasing capacitance with increasing bias • Suggested mechanisms • Capture-emission of carriers by trap levels [8] • Carrier transient response [9] • Carrier polarization [10] • Poole-Frenkel effect [11] • Interface-state effect [12] • We are focusing on the modeling of this behavior

24. Outline • Motivation • Model Description • Parameter Extraction • Model Validation • Model Scalability • Discussion • Conclusion

25. Conclusion • A complete DC and RF model of CMOS Schottky diodes and its parameter extraction strategy are (will be) established. • With different current transport mechanisms including thermionic emission, carrier velocity saturation and tunneling together with stray capacitance and inductance taken into account, the model predicts accurate results within 5% error, when evaluated with measurements up to 67GHz in 65nm and 130nm CMOS. • The model is scalable with the number of diode cells and the area of Schottky contact. • The model can be applied in mm-wave circuit design.

26. Thanks for your attention! Wenyuan Zhang, Yang Tang and Yan Wang Tsinghua University June 21st 2019