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Semiconductor Processing (front-end)

Semiconductor Processing (front-end). Stuart Muter 617.371.3853 smuter@ahh.com. 12/02/2002. Semiconductor Processing. Agenda: An overview of the key steps in semi-conductor processing (how to make one of Stuart’s wafers).

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Semiconductor Processing (front-end)

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  1. Semiconductor Processing (front-end) Stuart Muter 617.371.3853 smuter@ahh.com 12/02/2002

  2. Semiconductor Processing Agenda: An overview of the key steps in semi-conductor processing (how to make one of Stuart’s wafers). A lot of information is in the packet, we will not be able to cover it all.

  3. Table of Contents Section A Introduction to Semiconductor Manufacturing Section B Key Processing Steps - Deposition - Etch - Lithography - Doping and Anneal - CMP Section C Future Trends

  4. SECTION A: Introduction to Semiconductor Manufacturing

  5. Front End Processing Key Steps • Deposition • - CVD • - PVD • - Oxidation • Etch • Lithography • Doping and Anneal • - Diffusion • - Ion Implant • - RTP • CMP

  6. Moore’s Law Transistor density doubles every 2 years Moore’s Law Wafer Sizes Source: www.intel.com Source: Design News

  7. IC Feature Size Trends

  8. State of the Art Semi Device • 0.13 micron critical dimension (human hair diameter is approx. 100 microns). • 7 metal layers • 25 mask steps • 300 - 400 process steps

  9. State of the Art Fab • 300mm wafers • $2-3 billion cost • wafer cycle time: 30 -80 days • WIP: 20 - 40K wafers • Full material automation • Cleanroom: Class 10 or 100 • Mini-environment: Class 0.1

  10. Worldwide Semiconductor Market Source: WSTS 11/01 Semi and Semi-Equipment Industries Market Segmentation

  11. WFE Revenue Forecast by Equipment Segment ($ Millions) Semi-Equipment Industries Wafer Fab Equipment Spending Source: Gartner Dataquest (July 2002)

  12. Fab 0.5µ CMOS Process Flow Device Manufacturing

  13. Integrated Circuit Manufacturing Process The “big picture” process

  14. SECTION B: Key Processing Steps

  15. Blanket Metal Deposition Typically PVD or MCVD

  16. Physical Vapor Deposition • Preferred conductor deposition technology • Barrier and seed layer for Cu • DC/RF magnetron sputtering • Conductors: • - Al (interconnect), Ti, TiN, TiW (barrier and ARC), W (vias), Cu

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