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Digital Integrated Circuits - week seven -

Digital Integrated Circuits - week seven -. Gheorghe M. Ş tefan http://arh.pub.ro/gstefan/ - 2014 -. Comparator. Elementary comparator. Log-depth comparator. Complex (random) circuits. An universal circuit:. Size  O(2 n ) Depth  O(n). S EMUX = 6 S 3U_circuit = 42.

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Digital Integrated Circuits - week seven -

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  1. Digital Integrated Circuits- week seven - Gheorghe M. Ştefan http://arh.pub.ro/gstefan/ - 2014 -

  2. Comparator Digital Integrated Circuits - week seven

  3. Elementary comparator Digital Integrated Circuits - week seven

  4. Log-depth comparator Digital Integrated Circuits - week seven

  5. Complex (random) circuits An universal circuit: Size  O(2n) Depth  O(n) Digital Integrated Circuits - week seven

  6. Digital Integrated Circuits - week seven

  7. SEMUX = 6 S3U_circuit = 42 Digital Integrated Circuits - week seven

  8. S3InMajority = 12 Digital Integrated Circuits - week seven

  9. Many-input random circuit Digital Integrated Circuits - week seven

  10. Digital Integrated Circuits - week seven

  11. Digital Integrated Circuits - week seven

  12. Applying the de Morgan theorem results a Read-Only Memory (ROM) which is not a memory, it is a combinational circuit implemented as a Look-Up Table (LUT). xn-1, xn-2, … x0: is the “address” f, g, … s : is the “content stored at” xn-1, xn-2, … x0 Digital Integrated Circuits - week seven

  13. First-order – 1-loop digital systems • Elementary latch • Clocked latch • Master-slave flip flop: serial extension • Random Access Memory (RAM): parallel extension • Register: serial-parallel extension Digital Integrated Circuits - week seven

  14. Stable – unstable loops Digital Integrated Circuits - week seven

  15. Low-cost oscillator Digital Integrated Circuits - week seven

  16. Digital Integrated Circuits - week seven

  17. Serial composition: serial shift register Digital Integrated Circuits - week seven

  18. Parallel composition:Random Access Memory (RAM) Digital Integrated Circuits - week seven

  19. Digital Integrated Circuits - week seven

  20. Expanding the number of bits Digital Integrated Circuits - week seven

  21. Expanding the number of words Digital Integrated Circuits - week seven

  22. Synchronous RAM Digital Integrated Circuits - week seven

  23. For L < 130 nm writing is synchronous, while reading could be synchronous or asynchronous Example of synchronous reading: Digital Integrated Circuits - week seven

  24. Register file Digital Integrated Circuits - week seven

  25. Reading is asynchronous Digital Integrated Circuits - week seven

  26. Home work 7 Problem 1: Let be the log-depth comparator (see slide 4) with n = 8. Compute de size of the circuit (the number of inputs in all inverting circuits). Problem 2: Design, using the method presented in the slide no. 7, the circuit whose “program” is 11100100. Compute the final size (the number of inputs in all inverting circuits). Problem 3: Let be the low cost oscillator form the slide 16. Its output is connected to the input of an inverter. • Compute the frequency of the signal generated, fosc, when: • For the NAND gate: tpLH = 40ps, tpHL = 60ps • For the first NOT (connected to the NAND’s output): tpLH = 50ps, tpHL = 30ps • For the second NOT: tpLH = 100ps, tpHL = 60ps • What will be fosc if the output of the same oscillator will be connected to the input of two invertors instead of one? Digital Integrated Circuits - week seven

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