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EE 5340 Semiconductor Device Theory Lecture 28 - Fall 2009. Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc. Implanted n-channel enhance-ment MOSFET (ohmic region). 0< V T < V G. e- channel ele + implant ion. Channel. V S = 0. 0< V D < V DS,sat. E Ox,x > 0. n+. n+.
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EE 5340Semiconductor Device TheoryLecture 28 - Fall 2009 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc
Implanted n-channel enhance-ment MOSFET (ohmic region) 0< VT< VG e- channel ele + implant ion Channel VS = 0 0< VD< VDS,sat EOx,x> 0 n+ n+ e-e- e- e- e- ++++++++++++ Depl Reg p-substrate Acceptors VB < 0
Range Si & SiO2 Al Si3N4 DRP Si Al & SiO2 Si3N4 Ion implantation*
Vt per Eq. 9.1.23 in M&K for a MOSFET with an 87-nm-thick gate oxide, Qff/q = 1011 cm-2, N’ = 3.5 X 1011 cm-2, and Na = 2 X 1015 cm-3. Both VS and VB = Figure 9.8 (p. 441) Implanted VT
Body effect data Fig 9.9**
Subthreshold conduction • Below O.S.I., when the total band-bending < 2|fp|, the weakly inverted channel conducts by diffusion like a BJT. • Since VGS>VDS, and below OSI, then Na>nS >nD, and electr diffuse S --> D Electron concentration at Source Concentration gradient driving diffusion
Band diagram along the channel region of an n-channel MOSFET under bias, indicating that the barrier qΦB at the source depends on the gate voltage. M&K Fig.9.10 (p.443)
Measured subthreshold characteristics of an MOS transistor with a 1.2 μm channel length. The inverse slope of the straight-line portion of this semilogarithmic plot is called the drain-current subthreshold slope S (measured in mV/decade of drain current). M&K Fig. 9.11 (p.444)
Subthreshold current data Figure 10.1** Figure 11.4*
Mobility variationdue to Edepl Figures 11.7,8,9*
Velocity saturationeffects Figure 11.10*
Junction Field-Effect Transistor (JFET) Based on figure 12.18* n-type channel Active channel height, a L 0 Ch to Substr D.R.
Pinch-offVoltage Note: In depl mode devices, Vp0 > Vbi
Ideal JFET draincharacteristics Saturated: ID,sat ~ID1,sat Ohmic, ID1 ID ID,sat Non-physical analytic extension of ID1 VDS VDS,sat
n-channel JFET gatecharacteristic ID Saturated: ID,sat, approx. IDSS Saturated: ID1,sat VGS Vp
Graphical interpre-tation of gds and gd ID ID,sat Slope = gds Slope = gd VDS VDS,sat
Channel ModulationCapacitances Based on figure 12.18* n-type channel Active channel height, a L 0 Ch to Substr D.R.
Application of JFET theory to MESFET • The channel material is often GaAs • The substrate is often semi-insulating gallium arsenide (SI GaAs) • Vbi is replaced by Vnbi, the band-bending in the semiconductor • Often limited by surface state pinning and not determined exactly by cs • Neff is now exactly Nch
Final Exam • EE 5340 Section 001 • 8:00 to 10:30 AM • Tuesday, December 8 in • 108 NH • Cover sheet will be postedon web page at http://www.uta.edu/ronc/5340/tests/ • The Final is comprehensive • 20% to 25% on Test 1 material • 20% to 25% on Test 2 material • Balance of final on material since Test 2
References * Semiconductor Physics & Devices, by Donald A. Neamen, Irwin, Chicago, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986