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Teaching The Art of Verification

Teaching The Art of Verification. Faisal Haque Workshop on Teaching Verification DAC 2002. The Verification Space. Test plans. Test cases. HVL (VERA). Testbenches. Simulators. RTL Coverage. Functional Coverage. Bug tracking. Revision Control. Regressions. Debuggers.

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Teaching The Art of Verification

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  1. Teaching The Art of Verification Faisal Haque Workshop on Teaching Verification DAC 2002

  2. The Verification Space Test plans Test cases HVL (VERA) Testbenches Simulators RTL Coverage Functional Coverage Bug tracking Revision Control Regressions Debuggers Waveform viewers Build tools Directory Structure Covered in detail in The Art of Verification with Vera Covered at an introductory level

  3. Why We Wrote The Book • Large ASIC verification requires a different approach than used in past • Teach verification methodology for large ASICs • Teach testbench implementation using real life designs

  4. Premise • Verification is an art and a science • Creativity (art) in optimizing testbenches • Determinism (science) for repeatability • Tremendous complexity growth requires changes in our approach to verification

  5. Our Verification Model Planning Verification Plan # of Testbenches Test Cases Testbenches Create test cases Run and debug test cases Testing Functional Coverage Regression Coverage and Regression

  6. Our Testbench Model Design Under Test Generator transactor transactor Monitor packets 0101010 0101010 packets Automatically generates stimulus Operates at a higher level of abstraction Converts stimulus to binary vectors Interfaces to DUT Converts binary response to transactions Interfaces to DUT Checks Response Typically implements some reference model of DUT Operates at a higher level of abstraction • Modularization • High degree of concurrency • Architecture driven by checking policy

  7. What Students Need to Learn About Functional Verification (Beyond Software Engineering) • Identify testbenches and test cases • Manage the trade offs between number of testbenches and complexity • Create an architecture for the testbench(es) • Understand stimulus generation techniques • Understand result checking techniques • How to analyze coverage

  8. What the Book Covers • Simulation based verification • Verification methodology • Test plan • Test cases • Stimulus generation • Coverage analysis • Implementation • Vera language • Implementation of real testbenches with Vera

  9. Suggested Reading Paths Chapters 1,2, 3 Testbenches Test cases Stimulus, monitors Chapter 8 Chapter 12 Random Stimulus Generation Chapter 13 Result Checking Chapter 14 Coverage & Regressions Debugging Time

  10. Examples and Labs • Most simple concepts are explained using small examples • Main example is an Ethernet MAC • Test plan to implementation • Other examples are CPU and Ethernet switch • Most of the examples can be used as labs

  11. About the Authors • Faisal Haque • Over 18 years of experience. Currently involved in design and verification of complex systems at Cisco system • Khizar khan • Over 7 years of experience. Currently involved in verification of complex microprocessors at sun • Jon Michelson • Over 7 years of experience. Currently involved in verification and design of complex systems at Cisco system

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