雛型晶片設計 Prototype Chip Design

雛型晶片設計Prototype Chip Design Tsung-Yi Wu

Professor • Tsung-Yi Wu (吳宗益) • E-mail tywu@cc.ncue.edu.tw • Home Page: http://163.23.223.3/tywua/ • TEL: 7131

Course Outline • Credit：3 • No Text Book, Using Slides • Grading Policy • Lab & Attendance: 30% • Midterm: 30% • Project/Final (Experiment)： 40%

Topics • Introduction (1 week) • FPGA Architecture (1 week) • RTL Coding Style (Verilog) (2.5 weeks) • FPGA Design Flow (2.5 weeks) • XSA-3S1000/XSA-100 (1 week) • XSB-300E (1 week)

Topics • XILINX SPARTAN-3 Starter Kit (1 week) • Case Study (2 weeks) • PS/2 Interface (Keyboard Controller) • SRAM Controller • VGA Controller • Labs (4 weeks)

FPGA Architecture • IOB: Input/Output Blocks • CLB: Configurable Logic Blocks • Programmable Interconnections

FPGA Design Flow

FPGA Design Flow • Software • Synthesis • XILINX ISE • Simulation • Silos • Mentor ModelSim • Bit-stream Download • XESS Xtools

FPGA Design Flow • Hardware • FPGA Board • XESS XSA-100 • XSA-3S1000 • XESS XSB-300E • XILINX SPARTAN-3 Starter Kit • XESS • www.xess.com • XSA-100: 100K Gates (DYU) • XSA-3S1000: 1000K Gates • XSB-300E: 300K Gates

FPGA Design Flow • XILINX • www.xilinx.com • SPARTAN-3 Starter Kit: 200K Gates

FPGA Design Flow • Drink Machine—State Machine Version

FPGA Design Flow

XSA-100 • $199$79

XSA-100 • Features: • XC2S100 FPGA (100k gates) • 8-Mbyte SDRAM • 128-KByte Flash • 100 MHz programmable oscillator • Parallel port • mouse/keyboard PS/2 port • VGA monitor port • 7-segment LED • 84-pin prototyping interface

XSA-3S1000

XSA-3S1000 • Features: • XC3S1000 FPGA • XC9572XL CPLD • 32 MByte SDRAM • 2 MByte Flash • 100 MHz oscillator • Parallel port • Keyboard/mouse PS/2 port • 512-color VGA port • 7-segment LED • 2 pushbuttons • 4 DIP switches

XST-3.0

XST-3.0 • Features: • 10/100 Ethernet MAC+PHY • 20-bit stereo codec • stereo in/out ports • 8-bit video decoder • dual RCA video input ports • USB 1.1 peripheral-mode interface • RS-232 serial port • IDE hard disk interface • pushbuttons (4) • DIP switch • LED digits (2) • LED bargraph

XSB-300E • XSB-300E ($899)

XSB-300E • Block- Diagram

SPARTAN-3 Starter Kit • Starter Kit ($99)

SPARTAN-3 Starter Kit • Board View

SPARTAN-3 Starter Kit • Features • 200,000-gate Xilinx Spartan-3 XC3S200 FPGA in a 256-ball thin Ball Grid Arraypackage (XC3S200FT256) • 2Mbit Xilinx XCF02S Platform Flash • Two 256Kx16 ISSI IS61LV25616AL-10T 10 ns SRAMs • 3-bit, 8-color VGA display port • 9-pin RS-232 Serial Port

SPARTAN-3 Starter Kit • Features: • PS/2-style mouse/keyboard port • Four-character, seven-segment LED display • Eight slide switches • Eight individual LED outputs • Four momentary-contact push button switches

RTL (Register Transfer Level) Coding Style • Any code that is synthesizable is called RTL code. Verilog RTL

RTL (Register Transfer Level) Coding Style • Combinational circuit is used to calculate the next state of the flip-flops Outputs Inputs Combinational Circuit F( inputs, flip-flops ) Outputs Sequential Circuit Flip-Flops inside here

RTL Coding Style • Verilog Example of Priority Encoded if Statement module mult_if(a, b, c, d, sel, z); input a, b, c, d; input [3:0] sel; output z; reg z; always @(a or b or c or d or sel) begin z = 0; if (sel[0]) z = a; if (sel[1]) z = b; if (sel[2]) z = c; if (sel[3]) z = d; end endmodule

RTL Coding Style • Verilog Example for Single if Statement (Not Priority Encoded) module single_if(a, b, c, d, sel, z); input a, b, c, d; input [3:0] sel; output z; reg z; always @(a or b or c or d or sel) begin z = 0; if (sel[3]) z = d; else if (sel[2]) z = c; else if (sel[1]) z = b; else if(sel[0]) z = a; end endmodule

RTL Coding Style • Verilog for Single case Statement module case1(a, b, c, d, sel, z); input a, b, c, d; input [3:0] sel; output z; reg z; always @(a or b or c or d or sel) begin casex (sel) 4’b1xxx: z = d; 4’bx1xx: z = c; 4’bxx1x: z = b; 4’bxxx1: z = a; default: z = 1’b0; endcase end endmodule

RTL Coding Style • Area/Speed

Case Study • Keyboard Controller (PS/2)

Case Study • Simple CPU

0123456789 Bitstream Case Study • VGA Text Display

Case Study • Slot

雛型晶片設計 Prototype Chip Design