HENDA and Patara A solid state neutron detector and a prototype readout chip for the SNS

1. HENDA and PataraA solid state neutron detector and a prototype readout chip for the SNS Steven C. Bunch, Jonathan L. Britton, Benjamin J. Blalock The University of Tennessee Charles L. Britton, Jr. The University of Tennessee/Oak Ridge National Laboratory Douglas S. McGregor (P.I.), Russell Taylor, Tim Sobering, David Huddleston, Walter McNeil, Troy Unruh, Blake Rice, Steven Bellinger, Brian Cooper Kansas State University Lowell Crow Spallation Neutron Source/Oak Ridge National Laboratory A research project funded by the National Science Foundation

2. Spallation Neutron Source (SNS) Overview • Neutron Detector Overview (HENDA) • Chip Architecture (Patara) • Measurements • Next Steps • Conclusion Outline

3. SNS Overview • The Spallation Neutron Source (SNS) • Accelerator-based neutron source being built in Oak Ridge, Tennessee, by the U.S. Department of Energy. • It will provide the most intense pulsed neutron beams in the world for scientific research and industrial development. • At a total cost of $1.4 billion, construction began in 1999 and will be completed in 2006. • The construction of SNS was a partnership of six U.S. Department of Energy national laboratories: Argonne, Brookhaven, Jefferson, Lawrence Berkeley, Los Alamos, and Oak Ridge. • This collaboration was one of the largest of its kind in U.S. scientific history and was used to bring together the best minds and experience from many different fields. The SNS at ORNL is changing from a project into a facility! The first spallation neutrons were produced on April 28, 2006 For more information see http://www.sns.gov

4. PSD ElasticallyBent Si Xtal SNS Instruments VULCAN is a compound diffractometer for engineering applications Sample Bragg focusing can achieve spatial resolution of 0.1 mm, but a 1Dhigh resolution neutron detector is required to use it efficiently. SNAP (Spallation Neutrons and Pressure) is a Neutron Diffraction Instrument Dedicated to High Pressure Research Diamond anvil cell samplesmay be very small, so high resolution detectors are needed to resolve the diffraction pattern. Motivates development of a 2D version

5. Neutron Detector Overview High Efficiency Neutron Detector Array (HENDA) Linear pixels and bonding pads Etched holes >170 microns deep 30 micron diameter holes with 6LiF • Semiconductor linear thermal neutron detection imaging array • Reaction - n + 6Li 4He + 3H + 4.79 MeV • Pixel dimensions are 80 microns wide, and 4 cm long, with a 100 micron pitch • Contains 1000 pixels, each with expected intrinsic thermal neutron detection efficiency of >20% • Millions of holes filled with neutron reactive material increase the detector efficiency

6. Detector Measurements Measured results show that the efficiency is greatly increased with the perforated design With the holes backfilled with 6LiF, the thermal neutron detection efficiency is greatly increased With the perforated surface coated with 6LiF material, with holes not yet filled, already shows improvement over basic planar designs

7. Prototype Chip Architecture  “Patara” Specifications • Pulse-Processing Requirements • Pulse rate – 10 kcps • Pulse-Pair Resolution – 1ms • General Signal-Processing Requirements • For 10B detector coatings • 300 keV – 1.47 MeV or 12.8 fC – 65.6 fC • For 6Li detector coatings • 300 keV – 2.7 MeV or 12.8 fC – 120 fC

8. Chip Design Specifications • Preamplifier • Noise dominated by input FET < 1000 rms electrons • System uncertainties of a few keV necessary for lower-level gamma discrimination threshold of ~300 keV • Accept positive or negative input • Detector leakage current compensation • Able to handle detector capacitance up to 10 pF • Pole/Zero compensation network • Full gain or half gain adjustment • Shaper • Adjustable polarity • Four complex conjugate poles • Low noise < 10% of preamplifier (low-gain system) • FWHM ~ 270 ns • Settling time ~ 600 ns • Baseline Restorer • “Ground sensing” inputs

9. VDD M6 M7 M8 M9 M5 Vout Cc M4 Ibias M2 Feedback Network Cf M3 Qin M1 Preamplifier • Regulated cascode topology • M1 designed to optimize noise for detector capacitance of 5 pF using Cgs = method • M2 & M3 sized to contribute < 10% of M1 noise • Cc of 0.3 pF used to control stability of negative feedback loop between M2 & M3 • Feedback network needed to allow Cf to discharge after a charge pulse

10. Vdd Vdd 2 x Ibias 30 x Ibias Vdd Vdd Vref Vref 15x Ibias 15 x Ibias Rf2 15x Cf2 Cf A A To Shaping Circuit 15 x Cf V- Final Preamplifier Pole/Zero Compensation • Based on MOSFET feedback network and pole/zero compensation – Ludewigt, et al., TNS, vol. 41, no. 4, 1994. • Adapted from Low Frequency Feedback Loop topology • Increase Ibias to compensate for detector leakage up to 15 nA • Adjustable Vref sets dynamic range for either polarity input • Approximately 1.6 mW/channel

11. Vdd W 2 x W 4 x W 8 x W 2 x W 4 x W 8 x W 16 x W DS0 DS1 DS2 DS3 DS0 DS1 DS2 DS3 Ibias 2 x Ibias To Feedback Network Preamplifier Feedback Network Biasing To Pole/Zero Compensation Network Bias • Nanoampere current reference • Switchable bias current for detector leakage current compensation • Allows pole/zero compensation network to track feedback bias Henri J. Oguey and Daniel Aebischer, “CMOS Current Reference Without Resistance,” IEEE Journal of Solid-State Circuits, Vol. 32, No. 7, pp. 1132-1135, 1997.

12. Shaper Design Process • Shape pulse using 5-pole complex-conjugate semi-Gaussian filter • Pole-zero constellation optimized using MATLAB to approximate Gaussian shape • MATLAB script iterations using ‘radial variation’ and sensitivity analyses

13. Shaper Fundamentals V to I Converter 1 Real Pole Localized Feedback Localized Feedback Vout Vin Real Pole 2 Real Pole 3 Real Pole 4 Real Pole 5 Real Pole 1 (Op-Amp) H(s) = G Ideally, G Vbaseline • Semi-Gaussian pulse response with 1 real, 4 complex poles • 1 μ-sec pulse-pair resolution with gated baseline restoration (SNS synchronous) • Current-mode quasi-linear operation

14. Modified R-lens magnification Intrinsically low-noise R magnification allows small physical R to give low-frequency pole At higher signal levels, circuit is dynamic, but magnified small physical R dominates 1/gm for improved linearity over Gm-C filters Complex Conjugate Topology Vdd Ibias Iout (to next CC stage) Iin Vout (last stage only) C1 C2 R R G. Bertuccio, et al., “‘R-lens filter’: An (RC)n current-mode lowpass filter,” Electronics Letters, vol. 35, no. 15, 22nd July 1999.

15. Noise Measurements

16. Noise Measurements

17. Gain Measurements

18. Shaper Measurements • Pulse shape matches simulations very closely • FWHM ≈ 290 nsec • Full analysis of ‘dynamic noise’ upcoming • End-to-end nonlinearity < 5% in range of interest • Approximately 2.1 mW/channel

19. Next Steps • Discriminator, zero suppression, “SNS standard interface” • 64-128 channels • Interface with KSU HENDA • Integrate with SNS system for tests

20. Conclusions • Prototype chip fully functional on first-cut silicon with 3.7mW/channel power dissipation • Second fabrication pass in July 2006 for BLR offset improvements • Test at SNS in late summer 2006 with 252Cf sources • Submission of large final chip late in 2006