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FE-I4 and testing status

FE-I4 and testing status. ATLAS upgrade week (November 08 – 12). Motivation for FE-I4.

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FE-I4 and testing status

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  1. FE-I4 and testing status ATLAS upgrade week (November 08 – 12)

  2. Motivation for FE-I4 • Two applications forseen for FE-I4„Insertable B-Layer“sLHC outer layers- fallback solution for B-layer death - new pixel detector planned - increase tracking performance - 2 removable internal layers radii about 3.5 – 10 cm - 2-3 fixed outer layers radii about 15 – 25 cm - FE-I4 fits requirements for outer layers in terms of hit occupancy radiation hardness- small radius: ~3.5 cm Higher hit occupancy per pixel increased radiation damage low radiation length fraction

  3. FE-I4 reminder • ~6 times size of FE-I3 • Pixel size 50 x 250 µm • 26.880 pixels • 336 rows, organized in 40 DCs • Readout organized in four pixel regions, hits buffered at pixel level until LV1-trigger cope high occupancies • Global EoDCL, EoCHL, Data Output Block • Two configuration modes:- CMD decoder configuration- bypass configuration

  4. 1st wafer diced • 1st wafer was diced at 11th of october at LBNL. • 22 single chips, 6 mounted on SCC- Chips at LBNL-Chips at Bonn-Chip at SLAC-Cut lines • So far all 6 chips working- no detailed tests done on all

  5. Test system overview Tektronix DG2020Abased @ LBNL ATCA @ SLAC USBpix@LBNL | Bonn 

  6. Power, IOMUX, PLL, LVDS • Power up, check power consumption • Configure LVDS • Use INMUXselect to loop back signals on IoMuxIn to IoMuxOut basic loop back working

  7. Power, IOMUX, PLL, LVDS • Power up, check power consumption • Configure LVDS • Use INMUXselect to loop back signals on IoMuxIn to IoMuxOut  basic loop back working • Use INMUXselect to loop back clk, clk/8 or clk/10 (depending on 8b10b-encoding) to IoMuxOut  working

  8. Power, IOMUX, PLL, LVDS • Power up, check power consumption • Configure LVDS • Use INMUXselect to loop back signals on IoMuxIn to IoMuxOut  basic loop back working • Use INMUXselect to loop back clk, clk/8 or clk/10 (depending on 8b10b-encoding) to IoMuxOut  working • Configure PLL, loop back cleaned clk instead of reference clk  working

  9. Power, IOMUX, PLL, LVDS • Power up, check power consumption • Configure LVDS • Use INMUXselect to loop back signals on IoMuxIn to IoMuxOut  basic loop back working • Use INMUXselect to loop back clk, clk/8 or clk/10 (depending on 8b10b-encoding) to IoMuxOut  working • Configure PLL, loop back cleaned clk instead of reference clk  working • Few more systematic tests of INMUX:- PLL at 40, 80, 160 and 320 MHz to IoMuxOut- PLL_error_out to IoMuxOut- program shadow reg ab + c  no error found

  10. Power, IOMUX, PLL, LVDS • Power up, check power consumption • Configure LVDS • Use INMUXselect to loop back signals on IoMuxIn to IoMuxOut  basic loop back working • Use INMUXselect to loop back clk, clk/8 or clk/10 (depending on 8b10b-encoding) to IoMuxOut  working • Configure PLL, loop back cleaned clk instead of reference clk  working • Few more systematic tests of INMUX:- PLL at 40, 80, 160 and 320 MHz to IoMuxOut- PLL_error_out to IoMuxOut- program shadow reg ab + c  no error found IoMux, INMUXselect, LVDS receiver, PLL bypass configuration working register  basic functionality working • ScanChain + Efuse burning untested

  11. CMD decoder, global + pixel registers • Check CMD decoder states after sending CMD CMD reacts • Send global configuration, observe power consumption + effect (8b10b, PLL, data transmission rate, …) 8b10b Encoder, serializer,LVDS driver working

  12. 40 MHz clk Data at 160 Mbps 0011111001 1100000110 • - Check data output at 40, 160 Mbps • - Check data output at 8b10b en- / disabled • - Check Empty Record if 8b10b disabled • - Check loopback of EODC clk

  13. CMD decoder, global + pixel registers • Check CMD decoder states after send CMD CMD reacts • Send global configuration, observe power consumption + effect (8b10b, PLL, data transmission rate, …) 8b10b Encoder, serializer,LVDS driver working

  14. CMD decoder, global + pixel registers • Check CMD decoder states after send CMD CMD reacts • Send globalconfiguration, observe power consumption + effect (8b10b, PLL, data transmission rate, …) 8b10b Encoder, serializer, LVDS driver working • Short testscan through DACs, monitor output voltage on testpads  DACsreact • Send pixel configuration, read pixel configuration (uses DC, EoDCL and EoCHL)  data seem fine

  15. CMD decoder, global + pixel registers • Check CMD decoder states after send CMD CMD reacts • Send globalconfiguration, observe power consumption + effect (8b10b, PLL, data transmission rate, …) 8b10b Encoder, serializer, LVDS driver working • Short testscan through DACs, monitor output voltage on testpads  DACsreact • Send pixel configuration, read pixel configuration (uses DC, EoDCL and EoCHL)  data seem fine  Can configure complete chip, data generation logic and LVDS driver send expected data encouraging to inject hits

  16. Digital injection • Inject hit after analog pixel (digital injection) to selected pixel, send trigger cmd • Data output looks as expected • Raw data file looks fine (example on next slide…) Cmd in: Calibrate Trigger sent EMPTY Data Header + Pixel data Data Record Data Record Data Header Data Record Data Header IDLE 0 F 0 F 0 F R R R C

  17. Digital Test for all pixels • Enable all pixels, digital injection to all at the same time with length of 4 • Screenshot of raw data file: • Chip sends correct data: - col alternating due to 4 pixel region- row increasing by 2 due to phi pairing (tot0, tot1)- Time over Threshold equal 4 for all pixels

  18. Hit processing logic • Four pixel region  sends data • End of Double Column Logic working so far • End of Chip Logic Basic tests Ok • Next step:try to do automated Digital Test using mask shifting instead of injecting to all pixels at once good test for pixel register r/w chip + test system data handling

  19. Digital Scan result • Root plot of digital scan still for full pixel matrix to do • Mask shifting working • Digital injection working • Histogramming in FPGAworking

  20. Analog Pixel • Preamp output of testpixelmonitored on scopeafter injection command • Influence of some DACsvisible (ex. VthinDACchanges HitOR) Preamp output Injection CMD HitOR Hopefully more results, minimum analog test of all pixels

  21. Test result summary • Positive results so far • No non-working block found • Much more experience especially with analog pixel and calibration pulser needed • Looking forward to do extended and detailed tests on each functionality block

  22. BackUp

  23. Simulated efficiencies

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