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Status of SVD Readout Electronics

BPAC October 2012. Status of SVD Readout Electronics. Markus Friedl (HEPHY Vienna) on behalf of the Belle II SVD Collaboration. Introduction. I will focus on the readout chain between front-end and FTB COPPER already belongs to the unified DAQ. Finesse Transmitter Board (FTB).

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Status of SVD Readout Electronics

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  1. BPAC October 2012 Status ofSVD Readout Electronics Markus Friedl (HEPHY Vienna) on behalf ofthe Belle II SVD Collaboration

  2. Introduction • I will focus on the readout chain between front-end and FTB • COPPER already belongs to the unified DAQ Finesse Transmitter Board (FTB) FADC Front-End ~2mcoppercable Junctionbox ~10mcopper cable Unified opticaldata link (>20m) COPPER APV25 hybrids Rad-hardDC/DC converters Analog level translation,datasparsificationandhit time reconstruction Unified Belle IIDAQ system M.Friedl (HEPHY Vienna): SVD Readout Electronics

  3. Not Entirely New… • 2007: plans for an intermediate upgrade of Belle I SVD (inner 2 layers only) • Prototype system built and tested thoroughly in several beam tests since then • Now enlarging and improving details, but concept is same M.Friedl (HEPHY Vienna): SVD Readout Electronics

  4. Front-End Junction Box FADC FTB Summary M.Friedl (HEPHY Vienna): SVD Readout Electronics

  5. Front-End Electronics • APV25 front-end chip (developed for CMS) • Fast shaping, pipelined, rad-hard, well tested • Two different kinds of readout boards: • Origami chip-on-sensor scheme for center sensors • Conventional PCB hybrids for edge sensors PCB hybrid Origami PCB hybrid M.Friedl (HEPHY Vienna): SVD Readout Electronics

  6. Hybrid Boards & Origami • Edge hybrids designed & tested • DoubleOrigami module built in summer 2012 • More about Origami & ladder assembly by Y.Onuki M.Friedl (HEPHY Vienna): SVD Readout Electronics

  7. Front-End Junction Box FADC FTB Summary M.Friedl (HEPHY Vienna): SVD Readout Electronics

  8. Junction Box • Rad-hard DC/DC converters instead of regulators • CERN development • Allows to re-use existing PS system M.Friedl (HEPHY Vienna): SVD Readout Electronics

  9. DC/DC Converter Noise Measurements • Same noise within measurement precision (few %) between conventional and DC/DC powering! Test hybrid (larger) Belle II design(smaller) M.Friedl (HEPHY Vienna): SVD Readout Electronics

  10. Front-End Junction Box FADC FTB Summary M.Friedl (HEPHY Vienna): SVD Readout Electronics

  11. FADC (9U VME module) • Similar to Belle 1 SVD FADC, but with twice higher density (48 APV25 inputs) and more powerful FPGA M.Friedl (HEPHY Vienna): SVD Readout Electronics

  12. FADC Status • FADC Module • Circuit design completed (on paper) • Several circuit details tested already • Analog & digital level translation boards built and tested OK • Now working on translation into CAD and PCB layout • Surrounding components • FADC Controller, Buffer, Backplane • Will be designed after FADC (comparatively trivial) • Firmware development (also based on 2007 prototype) in parallel M.Friedl (HEPHY Vienna): SVD Readout Electronics

  13. Front-End Junction Box FADC FTB Summary M.Friedl (HEPHY Vienna): SVD Readout Electronics

  14. FTB (DAQ Link) • Porotype board exists • Optical link tests to COPPER at 2.54 and 3.175 Gb/s successful • Second iteration of PCB for minor corrections underway • More on FTB & readout integration by K.Hara M.Friedl (HEPHY Vienna): SVD Readout Electronics

  15. Front-End Junction Box FADC FTB Summary M.Friedl (HEPHY Vienna): SVD Readout Electronics

  16. Summary • Overall readout scheme • Based on existing (and working) 2007 prototypes • Front-end • APV25 readout with Origami and PCB hybrids • Junction Box • Rad-hard DC/DC converters (no noise penalty) • FADC • Circuit design done, PCB design ongoing • FTB • DAQ link tested successfully with prototype board M.Friedl (HEPHY Vienna): SVD Readout Electronics

  17. Thank you for your attention. Bad luck for Nadeshiko: Unlike 2011, they only made silver this year…

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