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Status of the CARIOCA project. Walter Bonivento CERN / INFN Cagliari for the LHCb collaboration and the CERN MIC group. The LHCb muon detector. LHCb muon detector: main task provide L0 trigger for b X Five stations, M1 to M5; four radial regions, R1 to R4.
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Status of the CARIOCA project Walter Bonivento CERN / INFN Cagliari for the LHCb collaboration and the CERN MIC group
The LHCb muon detector LHCb muon detector: main task provide L0 trigger for b X Five stations, M1 to M5; four radial regions, R1 to R4 R3-R4 of M4-M5 RPC 48% area rate cap. 1kHz/cm2 R1-R2 of M1 t.b.d. 1% area rate cap. 1MHz/cm2 the rest MWPC 52% area rate cap. 100kHz/cm2 W.Bonivento CERN/INFN Cagliari
Readout electronicsfor MWPC:a) detector architecture Main performance requirement: efficiency in 20ns >99% 2 bi-gap logically OR-ed (DIALOG chip) 2mm gap, 1.5mm wire spacing wire, cathode and combined readout W.Bonivento CERN/INFN Cagliari
Readout electronicsfor MWPC:b) requirements Detector signal: current with fast (ns) rise, fall Detector capacitance from 20pF to 200pF One threshold for time stamping: time resolution from slewing effect Optimum amplifier peaking time compromise between noise and slewing W.Bonivento CERN/INFN Cagliari
Readout electronicsfor MWPC:b) requirements Optimum amplifier peaking time: about 10ns At large Cdet weak dependence of time resolution on peaking time To be able to set the threshold at about 6 p.e. Measurements on a prototype chamber performed with a hybrid from PNPI and a modified version of ASDQ chip (M.Newcomer-Penn) noise <2fC for Cdet 40-250pF At gas gain of 105 average 40fC for wires and 20fC for cathode range 150fC for 95% of the signals W.Bonivento CERN/INFN Cagliari
Readout electronicsfor MWPC:b) requirements High rate: dead time pulse width <50ns unipolar and tail cancellation wire signals AC coupled with RLCdec= 100s baseline shifts baseline restoration Low cross-talk : Zin< 50 W.Bonivento CERN/INFN Cagliari
CARIOCAProject overview 80k FE channels at 1Mrad dose in 10 years custom chip in radiation tolerant technology 0.25 m CMOS Final goal: differential structure Cancels 1/t tail Cancels preamp tail W.Bonivento CERN/INFN Cagliari
CARIOCAProject overview PROTOTYPE CHIPS: step by step approach • 2000: positive preamp+current discriminator • +LVDS 4ch (1 analog ch.) • 2001: positive preamp+current discriminator • +LVDS 14ch W.Bonivento CERN/INFN Cagliari
CARIOCAProject overview • 2001: negative preamp 8ch analog • 2001: positive preamp+shaper 4ch analog (diff. out.) • 2001: positive preamp+shaper+voltage discriminator+LVDS 4ch (diff. out.) • 2002: positive and negative full chain with baseline restorer (diff.out.) W.Bonivento CERN/INFN Cagliari
The positive preamplifier:a) design Current amplifier NMOS with current mode feedback; unipolar Large input transistor W/L=1600m/0.7m Id=2mA at about 20MHz, the other two at 150MHz and 300MHz Dominant pole Followed by current discriminator (presented at LEB2000 by D.Moraes and replaced by a voltage discriminator in next version) +LVDS driver W.Bonivento CERN/INFN Cagliari
The positive preamplifier:b) measurements Digital (S-curve)... ...and analog measurements Linearity Response to a delta Sensitivity: 8mV/fC (measurement) W.Bonivento CERN/INFN Cagliari
The positive preamplifier:b) measurements Response to a delta Threshold vs.Cd Noise vs. Cd ENC = 867e- + 36e-/pF Channel uniformity of noise and threshold: 7% r.m.s. Cross talk around 1% Power consumption of about 18mW per channel dominated by LVDS driver Analog measurement Digital measurement Simulation (CADENCE) calculation from noise theory W.Bonivento CERN/INFN Cagliari
The positive preamplifier:b) measurements Problems of the discriminator: 1) it does not work below 10fC (need 5fC). It was tested on a chamber prototype efficiency plateau shifted by 100V w.r.t. to our best measurement (with ASDQ chip). 2) it slows down the signal rise-time significantly (input C of discr.) Peaking time vs.Cd 7ns are expected from p.a. alone Discriminator changed in next versions of the chip W.Bonivento CERN/INFN Cagliari
The negative preamplifier:a) design N2,N3,N4 replaced by PMOS W.Bonivento CERN/INFN Cagliari
The negative and positive preamp:frequency response negative CADENCE simulation positive Closed loop gain • 3dB level is at: • 16 MHz for negative • 23 MHz for positive Cdet=60pF Input impedance: below 50 W.Bonivento CERN/INFN Cagliari
The negative preamplifier:b) measurements Response to a delta Cd=15pF Cd=100pF Linearity Measurements Simulation W.Bonivento CERN/INFN Cagliari
The negative preamplifier:b) measurements Response to a delta Peaking time vs. Cd improved w.r.t first prototype Sensitivity vs. Cd Noise vs. Cd ENC= 951e- + 31e-/pF Channel uniformity of noise and threshold: 7% r.m.s. Measurements Simulation W.Bonivento CERN/INFN Cagliari
The negative preamplifier:b) measurements Response to a quasi 1/t pulse Cd=15pF Cd=100pF quasi 1/t injector W.Bonivento CERN/INFN Cagliari
The shaper:a) design Folded cascode fully differential balanced (CMF) Designed for 1ns peaking time (not to add to the preamp) Dominant pole (neglecting p.z. comp) at 160MHz W.Bonivento CERN/INFN Cagliari
The shaper:a) design • 2-pole/zero network to compensate for the 1/t tail • basic idea from R.A.Boie et al.,NIM 192(1982)365 • adapted to a differential amplifier design (M.Newcomer, Penn) Cdet=60pF W.Bonivento CERN/INFN Cagliari
The shaper:b) measurements This prototype chip with the positive preamplifier Response to a delta: single ended ouptut (true output will be differential) Cd=15pF Cd=100pF W.Bonivento CERN/INFN Cagliari
The shaper:b) measurements Response to a delta: single ended output (true output will be differential). Saturation current on ( ) and off ( ) Measurements Simulation Linearity: improved with saturation current ON (changes the DC level at the drain of N0) W.Bonivento CERN/INFN Cagliari
The shaper:b) measurements Response to a delta: single ended output (true output will be differential). Saturation current on. Cd=100pF Cd=15pF W.Bonivento CERN/INFN Cagliari
The shaper:b) measurements Response to a delta: single ended output Sensitivity vs. Cd Peaking time vs. Cd. Faster than negative consistent with different bandwidth ENC= 1290e- + 40e-/pF with saturation current ON Noise vs. Cd Parallel noise term higher than preamp alone due to two preamplifiers at shaper input Measurements Simulation W.Bonivento CERN/INFN Cagliari
The shaper:b) measurements Response to a quasi 1/t pulse Cd=100pF Cd=15pF W.Bonivento CERN/INFN Cagliari
The shaper:b) measurements Response to a quasi 1/t pulse Peaking time vs. Cd Measurements Simulation Sensitivity vs. Cd Pulse width vs. Cd W.Bonivento CERN/INFN Cagliari
Conclusions and perspectives Negative preamplifier and positive preamplifier with shaper chips tested and satisfying the requirements for LHCb operation • Amplifier+shaper+Voltage discriminator chip (following ATLAS MDT chip design) under test • +Baseline restoration chip under design W.Bonivento CERN/INFN Cagliari