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ITRS Public Conference Emerging Research Devices. 2012 ERD Chapter Victor Zhirnov, An Chen and Jim Hutchby. ERD – Key Messages. More-than-Moore Section: New entry will be added in – On-chip energy harvesting devices Emerging Research Memory:
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ITRS Public ConferenceEmerging Research Devices 2012 ERD Chapter Victor Zhirnov, An Chen and Jim Hutchby
ERD – Key Messages • More-than-Moore Section: • New entry will be added in – On-chip energy harvesting devices • Emerging Research Memory: • Considering moving Nanomechanical Memory into Transition Table • Execute workshops on Memory Select Devices and Storage Class Memory • Quantitative data for roadmapping • Emerging Research Logic: • Initiated discussion for possible transition of p-III-V & n-Ge alternate channel MOSFETs to PIDS & FEP • Formed a taskforce with RF/AMS on • Analog/RF properties of ERD devices • New functionalities for RF/AMS applications • Emerging Architectures: • Execute workshop on emerging research architectures (fundamental concepts)
What we’ve done so far in 2012 • ITRS ERD workshop on Assessment of Options for Emerging Memory Select Devices (April 22, 2012) • Formed a taskforce with RF/AMS for evaluation of ERD devices for RF/Analog application • Envisioned outcome: a parametrization table in ERD MtM section • Formed a taskforce with Interconnects for exploring emerging interconnects solutions for emerging research devices • Envisioned outcome: expanding ERD tables to include emerging interconnect solutions • Initiated discussion with Design and AP on exploring circuit design and application space for ERD
Quantitative data for roadmapping Workshop results will be summarized in a report Workshop presentations and the report will be put on ITRS website Due July 1, 2012 Take-away Messages and Further Actions: There are several categories of memory select devices depending on memory device type and applications e.g. RRAM or PCM e.g. embedded vs. stand-alone ERD Storage Class memory workshop in July 2012 will provide further insight A theoretical exploration of a ‘selector-less’ memory cell needs to be performed Memory element with a built-in select element (e.g. a Schottky diode) Materials/structure optimization for both memory and select functions Materials and Devices modeling could provide an important insight A joint ERD/ERM task Memory Select Devices Workshop Outcome
Workshop on emerging architectures for storage class memory Monterey, CA, July 8, 2012 Status: Agenda completed Workshop on emerging research logic devices Bordeaux, France, September 21, 2012 (ESSDERC-linked) Status: Date/Place fixed, Scope/Agenda TBD Workshop on emerging research architectures (Fundamental concepts) San Francisco, CA, Dec 9, 2012 (tentative) Status: TBD A book entitled “Emerging Nanoelectronic Devices” planned Contract with Wiley signed Due: October 2013 2012 ERD Events