1 / 13

RICH Update

Jianchun Wang Syracuse University 10/16/99 CLEO Meeting. RICH Update. Outline DAQ problems solved Recent results Status of DAQ Work to be done. DAQ Problems Solved. Software problem Corrupted data DAQ bug, results in digital +2 V not set Hardware problems in digital data boards

sonya-foley
Download Presentation

RICH Update

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Jianchun Wang Syracuse University 10/16/99 CLEO Meeting RICH Update • Outline • DAQ problems solved • Recent results • Status of DAQ • Work to be done

  2. DAQ Problems Solved • Software problem • Corrupted data • DAQ bug, results in digital +2 V not set • Hardware problems in digital data boards • VME buffer/driver destroyed( 14 boards affected ) • Wrong VME and Sequencer code • ADC buffer damaged ( 20 boards affected ) • Buffer enable conflict • Timing problem • Wrong timing caused wrong ADC to be read out Jianchun WANG, Syracuse University

  3. Corrupted Data • Noise expected to be 3-4 ADC counts (~500 e) • DAC address 0-3 was shifted to be 1-4 • Effectively digital +2V not set • Bug fixed and noise as good as expected • Parameter monitor and alarm working now Pedestal RMS (ADC counts) Jianchun WANG, Syracuse University

  4. Noise Performance • Each crate checked, no problem with CC and cable • Half cylinder tested simultaneously with repaired boards • Total noise ~ 3.6 ADC counts • Incoherent noise ~ 2.6 ADC counts (400 e) Jianchun WANG, Syracuse University

  5. Parameter Monitor • Parameter monitor: Voltages, Bias currents, Temperatures • protect data board, chamber, ensure data quality • Readout via SBUS • By Bayar & Jian • Auto measurement and alarm implemented • Need to integrate into main slow control and alarm system ****************************** * Crate: 123 Board: 4 * * Board ID: RICH ANALOG A025 * ****************************** ** Board values** Ch. 0 -> +5 analog: 480 4.996 V Ch. 1 -> -5 analog: 343 -5.191 V Ch. 2 -> +2 digital: 470 2.460 V Ch. 3 -> -2 digital: 477 -2.543 V Ch. 4 -> board temp: 509 25.224 C Ch. 5 -> cal pulse: 615 0.097 V ** Cell values** Ch. 0 -> +2 analog: 524 2.013 526 2.015 526 2.015 V Ch. 1 -> -2 analog: 216 -2.288 213 -2.291 214 -2.290 V Ch. 2 -> Vfp: 625 -0.486 628 -0.483 630 -0.480 V Ch. 3 -> Vfs: 688 0.673 682 0.667 685 0.670 V Ch. 4 -> Vref: 472 -0.673 474 -0.671 479 -0.665 V Ch. 5 -> prebias: 634 0.494 644 0.502 594 0.463 mA Ch. 6 -> shabias: 298 0.023 321 0.025 325 0.025 mA Ch. 7 -> iBuf: 0 0.000 1 0.000 1 0.000 mA Ch. 8 -> thermistor: 544 22.110 541 22.375 542 22.287 C Ch. 9 -> ADC offset: 741 1.811 741 1.811 740 1.808 V Jianchun WANG, Syracuse University

  6. Data Boards Jianchun WANG, Syracuse University

  7. ADC Buffer Problem • ADC readout difference is small within one chain with no front end electronics connected • Difference of 256 suggests that bit 8 may be wrong • Buffer damaged and bits shorted • Wrong buffer enable before initialization and during reprogramming • All 20 boards repaired ; all digital boards modified pull-up resistor array Jianchun WANG, Syracuse University

  8. Timing Problem • Wrong buffer timing or FIFO timing may cause wrong ADC selected (duplication, rotation ) • Test chain with no CC4 used to check all boards • 4 boards found such problem • All boards are adjusted Jianchun WANG, Syracuse University

  9. Wirepulse Calibration • Calibration pulse sent to anode wire and measure induced charge • Half cylinder shown here • Signal height quite uniform • Dead channels 0.4% Jianchun WANG, Syracuse University

  10. Plane Radiator Jianchun WANG, Syracuse University

  11. Jianchun WANG, Syracuse University

  12. Status of DAQ • DAQ version 9902 and 9904 were used in the runs shown • Version 9902 uses only software trigger on TIM, so two crates can not be triggered simultaneously • Version 9904 use DFC and GCAL send trigger to TIM, configuration manager not function • DAQ version dlib (Y2K) has a successful run on two RICH crates. More functions need to be tested. • More details, see Todd’s talk Jianchun WANG, Syracuse University

  13. Work To Be Done • Read out all RICH crates with new DAQ system • Measure pedestal, noise performance and wirepulse calibration to find any remaining problematic boards • Test new DAQ functions including single channel calibration and data sparsification • Continue coding on online monitor • Determine the mode for big calibration • Cosmic ray run Jianchun WANG, Syracuse University

More Related