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EE365 Adv. Digital Circuit Design Clarkson University Lecture #9 Math Units ROMs. Topics. Comparators Adders Multipliers ROMs. Lect #9. Rissacher EE365. 4-bit comparator. EQ_L. Equality Comparators. 1-bit comparator. Lect #9. Rissacher EE365. 8-bit Magnitude Comparator. Lect #9.
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EE365 Adv. Digital Circuit Design Clarkson University Lecture #9 Math Units ROMs
Topics • Comparators • Adders • Multipliers • ROMs Lect #9 Rissacher EE365
4-bit comparator EQ_L Equality Comparators • 1-bit comparator Lect #9 Rissacher EE365
8-bit Magnitude Comparator Lect #9 Rissacher EE365
Other conditions Lect #9 Rissacher EE365
X Y Cin S Cout 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Adders • Basic building block is “full adder” • 1-bit-wide adder, produces sum and carry outputs • Truth table: Lect #9 Rissacher EE365
Full-adder circuit Lect #9 Rissacher EE365
Ripple adder • Speed limited by carry chain • Faster adders eliminate or limit carry chain • 2-level AND-OR logic ==> 2n product terms • 3 or 4 levels of logic, carry look-ahead Lect #9 Rissacher EE365
74x2834-bit adder • Uses carry look-ahead internally Lect #9 Rissacher EE365
“generate” “half sum” carry-in from previous stage “propagate” Lect #9 Rissacher EE365
Ripple carry between groups Lect #9 Rissacher EE365
Look-ahead carry between groups Lect #9 Rissacher EE365
Subtraction • Subtraction is the same as addition of the two’s complement. • The two’s complement is the bit-by-bit complement plus 1. • Therefore, X – Y = X + Y + 1 . • Complement Y inputs to adder, set Cin to 1. • For a borrow, set Cin to 0. Lect #9 Rissacher EE365
Full subtractor = full adder, almost Lect #9 Rissacher EE365
Multipliers • 8x8 multiplier Lect #9 Rissacher EE365
Full-adder array Lect #9 Rissacher EE365
Faster carry chain Lect #9 Rissacher EE365
Read-Only Memories Lect #9 Rissacher EE365
Why “ROM”? • Program storage • Boot ROM for personal computers • Complete application storage for embedded systems. • Actually, a ROM is a combinational circuit, basically a truth-table lookup. • Can perform any combinational logic function • Address inputs = function inputs • Data outputs = function outputs Lect #9 Rissacher EE365
Logic-in-ROM example Lect #9 Rissacher EE365
4x4 multiplier example Lect #9 Rissacher EE365
Internal ROM structure PDP-11 boot ROM (64 words, 1024 diodes) Lect #9 Rissacher EE365
Two-dimensional decoding ? Lect #9 Rissacher EE365
Larger example, 32Kx8 ROM Lect #9 Rissacher EE365
Today’s ROMs • 256K bytes, 1M byte, or larger • Use MOS transistors Lect #9 Rissacher EE365
EEPROMs, Flash PROMs • Programmable and erasableusing floating-gate MOS transistors Lect #9 Rissacher EE365
Typical commercial EEPROMs Lect #9 Rissacher EE365
EEPROM programming • Apply a higher voltage to force bit change • E.g., VPP = 12 V • On-chip high-voltage “charge pump” in newer chips • Erase bits • Byte-byte • Entire chip (“flash”) • One block (typically 32K - 66K bytes) at a time • Programming and erasing are a lot slower than reading (milliseconds vs. 10’s of nanoseconds) Lect #9 Rissacher EE365
Microprocessor EPROM application Lect #9 Rissacher EE365
ROM control and I/O signals Lect #9 Rissacher EE365
Next time • Latches • Flip Flops • Clocking Lect #9 Rissacher EE365