System-on-a-Chip (SoC)

1. System-on-a-Chip (SoC) Lecture 6

2. SoC • (System On a Chip) The electronics for a complete, working product contained on a single chip • Complex functionalities that previously required heterogeneous components to be connected on a PCB, are integrated within one single silicon chip

3. SoC: Evolution • Technologies implementing embedded systems evolved from micro-controllers and discrete components to fully integrated SoCs • Reason: advances in silicon process technology enabling a complete system to be designed into one or few integrated devices • Space and Power reductions • Increased Performance

4. Features of SoC • Typically SoC incorporates • A programmable processor • On-chip memory • Accelerated Functional Units (e.g., Digital Encryption Standard block, MPEG2 decoder) • Peripheral devices • Often mixed technology designs integrating • Analog, RF Components • Micro-electro-Mechanical Systems (MEMS) • Optical input/output

5. SoC Design • Time and design effort required to integrate different types of components on a chip: a bottleneck for SoC evolution • Design reuse to reduce time to market • Use of parts from previous designs • Making use of parts designed by third parties • Hardware and Software component model! • All for PROVEN and tested solutions, avoiding re-design and re-verification of real-time hardware and real-time software

6. SoC Design Flow (traditional)

7. Sign-off Requirements capture Component design / programming Component testing libraries SoC Design Cycle Global testing (Initial) specification Architectural division Integration IP component reuse Implementation

8. Simulation models Sometimes physical prototypes, sometimes software approximation of desired system • Very helpful for: • Tuning the specification (runs faster than full implementation) • Predicting the system’s behavior and suggesting tests • Performing crude early analysis of performance and dimensioning • But: • No relation guaranteed between simulation and further implementation • Not meant for code production • Formalisms:Matlab/Simulink, SystemC/C++,…

9. SoC Design Abstractions • ESL Design • User functional level description • C/C++, SystemC + TLM, Simulink, Matlab, UML. • RTL Design • Converts user specification into register level description. • Describes exact behavior of the chip, with I/O cxns. • Verilog, VHDL, SystemC(!) • Physical Design • Takes the RTL + library of available logic gates • Defines places for gates + wires them

10. IP-based Design • Intellectual Property Cores • Parameterized components with standard interfaces facilitating high level synthesis • Cores available in three forms • Hard • Black-box in optimized layout form and encrypted simulation model. Example: microprocessors • Firm • Synthesized netlist which can be simulated and changed if needed • Soft • Register transfer level (RTL) HDLs; user is responsible for synthesis and layout

11. Platforms • Embedded Applications built using • Common architectural blocks and • Customized application specific components • Common architectures • Processor, memory, peripherals, bus structures • Common architectures and supporting technologies (IP libraries and tools) together called as platforms or platform-based designs • Latest trend in the Embedded Systems

12. Platform-based SoC • Platform-based SoCs are systems embedded on a chipthat contain • IP blocks like embedded CPU, embedded memory, • Real-world interfaces (e.g., PCI, USB), • Mixed signal blocks and • Software components • Device drivers, real-time operating systems and application code

13. Classes of Platforms • Full Application Platforms • Platforms that let derivative product designers create applications on top of hardware-software architectures • A set of hardware modules • Example: Complex dual processor architecture with hierarchical bus system tailored to a specific product’s requirements • A layer of firmware and driver software • Examples: Philips’ Nexperia, TI’s OMAP

14. Classes of Platforms (2) • Processor Centric Platforms • Typically centered on specific processors • Key software services like real-time OS kernel made available through libraries • Examples: ARM Micropack, ST Microelectronics ST100 • Communication Centric Platforms • Communication fabric optimized for specific application • Fabrics often bundled with specific processors • Examples: ARM AMBA, IBM CoreConnect bus architecture

15. Classes of Platforms (3) • Configurable (Programmable) platforms • Programmable logic added to the platform allows consumers to customize using both hardware and software • Field programmable gate array (FPGA) added to hard-coded processor centric platforms • Examples: Altera Excalibur platform with ARM cores, Xilinx Vertex II Pro

16. Multi-processor SoC (MPSoC) • Full application platform • Multiple processors • CPUs, DSPs, etc. • Hardwired blocks • Mixed-signal • Custom memory system • Lots of software

17. Philips Nexperia • Also a full application platform • Multimedia applications: set-top box, etc. • 2 CPUs, 3 busses, several accelerators, I/O devices.

18. Assignment

19. Philips Nexperia

20. TI OMAP Imaging &VideoAccelerator(IVA) 2D/3DGraphics Accelerator • Targets communications, multimedia. • Multiprocessor with DSP, RISC ARM11 + VFP TMS320C55x DSP L3 Interconnect LCD I/FVideoOut Camera I/F MemoryController Internal SRAM Peripherals L4 Interconnect Security OMAP2420

21. ST Nomadik • Targets mobile multimedia. • A multiprocessor-of-multiprocessors.

22. OMAP Open Multimedia Applications Platform

23. OMAP • OMAP Application processor has a dual-core architecture: ARM9 + TMS320C55 • OMAP design chain includes • Software IPs: OMAP supports several RTOS’s to suit different applications • Application and Middleware: Ported applications and middleware like MPEG-4 decoding and audio playback

24. Design Chain for OMAP

25. OMAP Hardware Architecture

26. OMAP Hardware Architecture • ARM RISC core is well suited for control code (OS, User Interface, OS applications) • DSP best suited for signal processing applications like video, speech processing, audio • Power efficient because signal processing task on DSP consumes much less power than on ARM

27. Example Application • Video-conferencing • C55x DSP can process in real-time full video conferencing application (audio and video at 15 images/sec) using only 40% of the available computational capability • Can manage other applications concurrently • ARM processor can handle OS operations and other OS applications (may be Word, Excel, etc.) • Less power consumption on the whole

28. Peripherals • Includes numerous interfaces to connect peripherals or external devices from either the DSP or GPP • Some interfaces • Camera and Display interface • Serial unidirectional compact camera port, 8-bit parallel interface, 8/16 bit bi-directional display interface, OMAP internal LCD controller • Several Serial interfaces • SPI, McBSP, I2C, USB, UART

29. Software Architecture • Defines an interface scheme that allows GPP to be the system master • Called the DSP/BIOS Bridge • DSP/BIOS Bridge provides communications between GPP tasks and DSP tasks • High level application developers use a set of DLLs and drivers

30. OMAP2 • Includes multiple engines executing multiple tasks • An ARM 11 based microprocessor runs the OS and performs supervisory control • DSP core focuses on audio codecs, echo cancellation and noise suppression • 3D graphics engine enables sophisticated graphics rendering • Video/imaging accelerator handles streaming MPEG4 video and mega-pixel resolution camera • Digital baseband processor implements network communications as a cellular modem handling voice and data

31. OMAP 2 Architecture

32. OMAP2 • All blocks operate simultaneously • No degradation in quality of any service • Devices remain highly responsive • To conserve power each of these subsystems can be shut down when not used • SoC suited for implementation of Smart Phone

33. Digital Media Processor • Functionalities expected in a portable media system • Live preview: Capture, process, display • Live video capture: Compresses • Live image capture: Compresses • Live audio capture: Compresses • Video decode/playback • Still image decode/display • Audio decode/playback • Photo printing • Several of these modes operate concurrently

34. DM 310 Media Processor • Four subsystems: imaging/video, DSP, coprocessor, ARM core • Imaging/Video system: CCD controller, preview engine, onscreen display, video encoder • DSP: TMS32054X operating at 72MHz (Max.) performs bulk of audio/image/video processing operations • Co-processors: SIMD engine (8 or 16 bit), Quantization, Variable length coder working concurrently • ARM Core: manages system level tasks, controls all components on chip except DSP and its co-processor

35. TMS320DM310 Architecture

36. Application: Still Camera Engine

37. Reconfigurable Platforms

38. Configurable SoC • Consisting of • Processor • Memory • On-chip reconfigurable hardware parts for customization to application • Towards application specific programmable products

39. FPGA-based RC • Programmable fabric that can be dynamically reconfigured • Mapping to FPGA • Only the time consuming computations are mapped • Computation expressed in HDL • Structure • FPGA + Memory

40. Programmable Platforms • Several products incorporate microprocessor and FPGA on one chip

41. Triscent A7 SoC CSL: performs basic combinational and sequential logic functions

42. Configurable processors • Configurability: • Processor parameters (cache size, registers, etc.) • Instructions • Result: • HDL model for processor. • Software development environment.

43. Summary • We have learnt about SoC. • Understood the design process of SoCs. • Overviewed various types of platforms • Looked at OMAP in some detail • Got an introduction to the concept of reconfigurable computing & ASIPs.