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MICE Tracker Readout Update

MICE Tracker Readout Update. AFE IIt firmware development VLSB firmware development Hardware progress Summary. Terry Hart, MICE Tracker Meeting, July 12, 2007. AFE IIt Firmware Modifications. Memory Bank. Modifications needed for data buffering Shorten time to digitize data

michael-burt
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MICE Tracker Readout Update

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  1. MICE Tracker Readout Update • AFE IIt firmware development • VLSB firmware development • Hardware progress • Summary Terry Hart, MICE Tracker Meeting, July 12, 2007

  2. AFE IIt Firmware Modifications Memory Bank Modifications needed for data buffering • Shorten time to digitize data • Zero suppression • End digitization series after last channel above threshold These are done. • Protocol for data transfers between DFPGA and AFPGA • Bitmaps from DFPGA to AFPGA • Digitized data from AFPGA to DFPGA This is done. • Buffer triggers in DFPGA FIFO This is done. DFPGA AFPGA AFPGA ADC ADC ADC ADC TriP-t TriP-t TriP-t TriP-t Data from VLPCs

  3. Immediate AFE IIt Firmware Tasks • Synthesize AFGPA and DFPGA firmware modifications. • FNAL concentrating of AFPGA • RAL concentrating on DFPGA • Compilation of latest code versions to be done soon. • Test operation of entire board. • Check compatibility of modified firmware with existing firmware. • ChipScope signal analyzer will check if signals match simulations. Terry Hart, MICE Tracker Meeting, July 12, 2007

  4. VLSB Firmware VLSB memory banks storing charge and time data • Main task: set up initial signals correctly for simulation • Documentation and expertise are limited • Need to dig into code • Modifications for MICE • Event counter during spill • Fast clear of VLSB memory • Overwrite memory addresses when there’s null data so that data are stored in continuous memory blocks. • Enable Direct Memory Access block transfer DFPGA directs DFPGA and AFPGA data flow AFPGA controls ADC and TriP-t operation Terry Hart, MICE Tracker Meeting, July 12, 2007

  5. Hardware Updates • VLSB Boards • 9 boards are built (to be spares), • 15 more to be made • Supervision of VLSB board assembly from FNAL CD to FNAL APC hasn’t been smooth. • Process of VLSB board assembly being worked out. • AFE IIt boards/Cryostat • Data taken for 2 of 4 production cryostats (8 boards assigned). • Preliminary assignment of 7 of 8 boards made for 2 remaining cryostats. • 8 spare boards remaining after 15 assigned boards (23 total AFE IIt boards for MICE) Terry Hart, MICE Tracker Meeting, July 12, 2007

  6. Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec TriP-t/ADC Control Firmware Hardware tests DFPGA/AFPGA I/O Bus Board test at 53.104 MHz Board test at 55 MHz Simulations at different frequencies Data transfer protocol AFPGA Firmware Write firmware controlling bitmap transfers Test pipeline/buffer operation Test mode development DFPGA Firmware Make 4-level trigger buffer Data format VLSB Firmware Event aggregation (VLSB) Data block transfer Fast clear of memory banks Suppress writing zeros to memory VLSB Board Manufacture (13 boards) AFE IIt Board Preparation Repairs for MICE Firmware and hardware modifications Board characterization in cryostats Ship cryos/boards to RAL Done Done Done Conservative simulations indicate this is marginal Conservative simulations this is marginal Done Done Standalone routine written Feedback loop testing previous version Done Done Low to middle priority Done Should be quick Initial code written, needs to be tested Process being worked out Ongoing Ongoing Ongoing Data taken for cryostats 1 and 2 Cryostats 1 and 2 shipped

  7. Summary • First version of AFE IIt firmware development to enable trigger buffering done. • Analysis of AFE IIt signals to be started soon. • VLSB firmware development almost done. • Almost all AFE IIt boards for MICE are available. • VLSB board assembly for MICE stalled for now. Terry Hart, MICE Tracker Meeting, July 12, 2007

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