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Performed by: Daniel Heifetz, Vladimir Lifliand Instructor: Dimitry Sokolik

Technion - Israel institute of technology department of Electrical Engineering. הטכניון - מכון טכנולוגי לישראל הפקולטה להנדסת חשמל. High speed digital systems laboratory. המעבדה למערכות ספרתיות מהירות. דו”ח סיכום פרויקט (חלק א’) Subject:. Project name.

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Performed by: Daniel Heifetz, Vladimir Lifliand Instructor: Dimitry Sokolik

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  1. Technion - Israel institute of technology department of Electrical Engineering הטכניון - מכון טכנולוגי לישראלהפקולטה להנדסת חשמל High speed digital systems laboratory המעבדה למערכות ספרתיות מהירות דו”ח סיכום פרויקט (חלק א’) Subject: Project name Performed by: Daniel Heifetz, Vladimir Lifliand Instructor: Dimitry Sokolik סמסטר (חורף) שנה 2001/2002 1

  2. High speed digital systems laboratory המעבדה למערכות ספרתיות מהירות Abstract The purpose of the system is to transfer the picture produced by the Kirilian camera to the PC for image processing and research. This is done using a CCD sensor and interface circuitry. The system is connected to the PC using the very popular and widely used USB interface. 2

  3. High speed digital systems laboratory המעבדה למערכות ספרתיות מהירות System description Main components of the system: 800x600 CCD sensor, FIFOs which receive the image from the CCD, USB bus controller for PC interfacing and ALTERA FPGA to control all of the above. When a command is received from the PC software through the USB bus, CCD takes a picture which is stored immediately in the FIFO’s. Then the picture is transferred to the PC using the USB controller and can stored or displayed. The transfer speed is limited by the USB bus throughput which is 12Mbit/sec max. The ALTERA component leads the process decoding the commands sent from the PC, controlling the CCD sensor the FIFOs and the USB controller. 3

  4. High speed digital systems laboratory המעבדה למערכות ספרתיות מהירות Specification • OmniVison 800x600 CCD sensor, OKI 2x 1Mbit FIFO, • Flex 10K50 Altera, ScanLogic SL811S USB slave controller. • Windows client application, written using MFC. 4

  5. High speed digital systems laboratory המעבדה למערכות ספרתיות מהירות System Block Diagram 5

  6. High speed digital systems laboratory המעבדה למערכות ספרתיות מהירות FPGA Block Diagram To SL811S chip From FIFO Data[7..0] SL811S init module SL811S Interrupt decoder Function EP0 (setup/control) Function EP1 (Read) SL811S I/O module Function EP2 (Write) Internal bus and inter-block controls Command[7..0] Data[7..0] To FIFO FIFO control Camera control unit USB resuest decode To Sensor SCCB bus FIFO control unit 6

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