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Rich Katz, Grunt Engineer NASA Office of Logic Design

Briefing: RT54SX-S, RTSX-SU, RTAX-S, and Eclipse FPGAs for Spaceborne Application Introduction. Rich Katz, Grunt Engineer NASA Office of Logic Design. Schedule and Logistics. 9:30 am Meeting starts 12:30 pm Lunch. Buildings 1 and 21 have cafeterias 1:45 pm Meeting resumes

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Rich Katz, Grunt Engineer NASA Office of Logic Design

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  1. Briefing: RT54SX-S, RTSX-SU, RTAX-S, and Eclipse FPGAs for Spaceborne ApplicationIntroduction Rich Katz, Grunt Engineer NASA Office of Logic Design

  2. Schedule and Logistics • 9:30 am Meeting starts • 12:30 pm Lunch. Buildings 1 and 21 have cafeterias • 1:45 pm Meeting resumes • Work until we're done Audio and video recording is not permitted. Presentations will be posted to klabs.org after the Briefing.

  3. Q&A and Discussion • Q&A and discussion is strongly encouraged • Please state name and affiliation • Please use the microphones • Everyone in the auditorium can hear you • People on Webex • Quick points during presentation OK • Hold discussion items for after a presentation • Many questions are answered in later slides • Note the page number, we’ll flip back • Briefing design with short modules

  4. NASA FPGA Meeting Summary • January 2004, Independent Assessment Team • April 2004, Design Seminar • July 2004, Briefing: Actel RTSX-S and RTSX-SU • 2004 MAPLD International Conference - September, 2004 • September 2004, Briefing: RTSX-S and RTSX-SU • February 2005, Briefing: Independent NASA Test of RTSX-SU FPGAs • February 2005, Briefing: Independent NASA Test of RTSX-SU FPGAs • 2005 MAPLD International Conference - September, 2005 • January 2006- Briefing: RT54SX-S, RTSX-SU, RTAX-S, and Eclipse FPGAs for Spaceborne Application • May 2006 - Briefing: RT54SX-S, RTSX-SU, RTAX-S, and Eclipse FPGAs for Spaceborne Application • September 2006: MAPLD International Conference, Washington, DC

  5. * Seminars held monthly * Register for seminar mailing list

  6. Speakers • Rod Barto, NASA Office of Logic Design • Daniel Elftmann, Actel Corporation • Larry Harzstark, The Aerospace Corporation • Rich Katz, NASA Office of Logic Design • Ken LaBel, NASA Goddard Space Flight Center • Gerald Matia, Aeroflex Colorado Springs

  7. Program • Introduction, Rich Katz, NASA OLD • RTAX-S Notes, Rich Katz, NASA OLD • DPA: Aeroflex Eclipse, Rich Katz, NASA OLD • LOLA 1553 Chip Overview, Rod Barto, NASA OLD • NASA RTSX-SU Test Update, Presented by Daniel Elftmann, Actel • Actel RTSX-SU FPGA Reliability Summary, Daniel Elftmann, Actel • Aeroflex RadHard FPGA Reliability Update, Gerald Matia, Aeroflex • Aerospace Space Qualification Testing: Status of Actel RTSX-SU Field Programmable Gate Arrays, Larry Harzstark, The Aerospace Corporation • Actel RTAX-S FPGA Reliability Summary, Daniel Elftmann, Actel • Radiation Characterization of a Hardened 0.22 m Anti-Fuse Field Programmable Gate Array, Presented by Ken LaBel, NASA Goddard Space Flight Center • High Speed Testing of the Aeroflex RadHard Eclipse FPGA, Presented by Ken LaBel, NASA Goddard Space Flight Center • RTAX-S Single Event Effects (SEE) High-Speed Test Results – Update, Ken LaBel, NASA Goddard Space Flight Center

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