Rich Katz, Grunt Engineer NASA Office of Logic Design

1. RTAX-S Notes Rich Katz, Grunt Engineer NASA Office of Logic Design

2. AX and RTAX-S Databases • Collecting AX and RTAX-S .adb files • Collecting statistics on structures used. • For internal use only. • Used for designing test vehicles • Used for interpreting test results • Send to either: • richard.b.katz AT nasa.gov • Dan.Elftmann AT actel.com

3. RTAX-S DSCC Status Released DSCC Drawings: 04221: RTAX2000S, Dated: 5 April 2006 04220: RTAX1000S, Dated: 20 April 2006 04219: RTAX250S, Dated: 20 April 2006 Drawings available at: http://klabs.org/DEI/References/MilSpecs/FPGA/FPGA_Specs.htm#Actel http://www.dscc.dla.mil/Programs/MilSpec/

4. RTAX-S Specification Notes Junction temperature limits, common to many parts of this feature size, are discussed in January 2006 Briefing and in “OLD News #18: New FPGA Technologies: Currents, Voltages, and Temperatures” http://klabs.org/richcontent/old_news/old_news_18/

5. RTAX-S Specification Notes RTAX-S specifications were modified to allow for the effects of single event transients (SETs) in voltage regulators while maintaining reliability margins. Note 10: AC transient VCCA limit is for radiation induced transients less than 10 µs duration, and not intended for repetitive use. Core voltage spikes from a single event transient will not negatively affect the reliability of the device if, for this non-repetitive event, the transient does not exceed 1.8 V at any time, and the total time that the transient exceeds 1.575 V does not exceed 10 µs in duration.

6. RTAX-S Specification NotesVoltage Regulator Single Event Transients 10 µs 1.8 V 1.575 V

7. RTAX-S Specification NotesVoltage Regulator Single Event Transients 10 µs 1.575 V

8. NASA Advisory NA-GSFC-2006-01:Request for Information and Lessons Learned • Previous Program • Lack of global perspective led to many individual approaches for analyzing and categorizing the anomaly. • Cost and schedule impacts were large at both the project and NASA levels. • Reference Block 12, reproduced here: • NASA GSFC kindly requests other NASA programs and projects to share with the Advisory Technical Point of Contact (see block 13) all DPA and Failure Reports on FPGAs and non-volatile memory devices, from both flight and engineering model usage along with lessons learned that can benefit the community. Non-NASA organizations may also send in their reports. Note that prior to dissemination on the NASA Office of Logic Design web site, appropriate care (i.e. deleting items such as contractor names) will be taken. • Advisory Technical Point of Contact (block 13) • Rich Katz, Code 564.0, NASA Office of Logic Design • richard.b.katz AT nasa.gov

9. NASA Advisory NA-GSFC-2006-01:Request for Information and Lessons Learned • Data will be handled responsibly and all reports appropriately “sanitized.” • Original data will be reviewed and analyzed, in cooperation with Advisory Technical POC, by Code 562.0, Parts, Packaging and Assembly Office. • Trend analysis will be performed on the data, using these factors to look for emerging or repeat patterns. • NASA Office of Logic Design will publish reports on the klabs.org www site.

10. RTAX-S Test PlanObjectives, Plan Overview, and Themes • Plan presented at January 2006 briefing. • “Get ahead of the curve” – find RTAX-S problems as early as possible and solve them • Proceed similar to successful NASA Office of Logic Design independent test for NESC on RT54SX-S/RTSX-SU • Complement the work of vendor (Actel) • RTAX-S Part quantities (~556) • Part types (all three models, focus on RTAX250S and RTAX2000S) • Test two lots • Independent of qualification lots already tested • Plan approved by the NASA Engineering and Safety Center (NESC)