ITRS Public Conference Emerging Research Devices Preparations for 2009 ERD Chapter Re-write

1. ITRS Public ConferenceEmerging Research Devices Preparations for 2009 ERD Chapter Re-write Agenda Emerging Research Technology Workshops (ERD/ERM) Carbon-based Nanoelectronics Highlight Korea ERD Jim Hutchby – SRC U-In Chung - Samsung December 9, 2008

2. Emerging Research Devices Working Group • Atsuhiro Kinoshita Toshiba • Franz Kreupl Qimonda • Nety Krishna AMAT • Zoran Krivokapic AMD • Phil Kuekes HP • Lou Lome IDA • Hiroshi Mizuta U. Southampton • Murali Muraldihar Freescale • Fumiyuki Nihei NEC • Dmitri Nikonov Intel • Wei-Xin Ni NDL • Ferdinand Peper NICT • Yaw Obeng NIST • Dave Roberts Air Products • Kaushal Singh AMAT • Sadas Shankar Intel • Thomas Skotnicki ST Me • Satoshi Sugahara Tokyo Tech • Shin-ichi Takagi U. Tokyo • Ken Uchida Toshiba • Yasuo Wada Toyo U. • Rainer Waser RWTH A • Franz Widdershoven NXP • Jeff Welser NRI/IBM • Philip Wong Stanford U. • Kojiro Yagami Sony • David Yeh SRC/TI • In-Seok Yeo Samsung • In-K Yoo SAIT • Peter Zeitzoff Freescale • Yuegang Zhang LLLab • Victor Zhirnov SRC • Hiroyugi Akinaga AIST • Tetsuya Asai Hokkaido U. • Yuji Awano Fujitsu • George Bourianoff Intel • Michel Brillouet CEA/LETI • Joe Brewer U. Florida • John Carruthers PSU • Ralph Cavin SRC • U-In Chung Samsung • Philippe Coronel ST Me • Shamik Das Mitre • Erik DeBenedictis SNL • Simon Deleonibus LETI • Kristin De Meyer IMEC • Michael Frank AMD • Christian Gamrat CEA • Mike Garner Intel • Dan Hammerstrom PSU • Wilfried Haensch IBM • Tsuyoshi Hasegawa NIMS • Shigenori Hayashi Matsushita • Dan Herr SRC • Toshiro Hiramoto U. Tokyo • Matsuo Hidaka ISTEK • Jim Hutchby SRC • Adrian Ionescu ETH • Kohei Itoh Keio U. • Kiyoshi Kawabata Renesas Tech • Seiichiro Kawamura Selete • Rick Kiehl U. Minn • Hiroshi Kotaki Sharp

3. Evolution of Extended CMOS Elements Existing technologies More Than Moore ERD-WG in Japan New technologies Beyond CMOS year

4. A Taxonomy for Research Devices - I

5. A Taxonomy for Research Devices - II

6. A Taxonomy for Research Devices - III

7. Determine which, if any, current approaches to providing a “Beyond CMOS” information processing technology is/are ready for more detailed roadmapping and enhanced investment. New ERD/ERM Roadmapping Task

8. Workshop (For each of the seven technologies) Receive expert inputs (pro & con) Clarify status, potential, and remaining challenges Formulate discussion/decision points to be considered in the Sunday ERD/TWG meeting Emerging Research Devices Working Group Mtg. Discuss and reach approximate consensus on potential & challenges for each technology Reach approximate consensus on 1 or 2 “Beyond CMOS” technologies sufficiently mature to benefit from accelerated engineering development Objectives

9. Develop/decide process, milestones, timeline Develop invitation to advocates & opponents Introduction Potential of technology – fundamental limits Barriers – Fundamental vs. technological/engineering Evaluation Criteria Definition of 1 or 3 specific devices for roadmapping Readiness in 15 years ERD WG Process for Narrowing Candidate Technology Options for Beyond CMOS Information Processing Devices

10. Identify Major information processing technology candidates Strong technical proponent and opponent teams and their leaders Knowledgeable ERD Mentor for each proponent team Key questions to be addressed by the teams Background materials for each technical candidate Issue invitations to team leaders and obtain their commitments Obtain a white paper & background materials from each candidate technology proponent team for ERD review ERD WG Process for Narrowing Candidate Technology Options for Beyond CMOS Information Processing Devices

11. ERD WG rate and prioritize candidate IP technologies using a formal process prior to FxF meeting. Conduct a FxF review of categories with each proponent & opponent team making a presentation On second day of ERD FxF meeting, discuss/decide ERD’s prioritized recommendation of narrowed IP technology options. This will include selection of 1 -2 specific devices for roadmapping within the recommended option Write & submit report on ERD WG’s recommendations ERD WG Process for Narrowing Candidate Technology Options for Beyond CMOS Information Processing Devices

12. Decision Making & Majority Voting Scheme Each member of ERD WG will be given a maximum of 3 votes to use in voting for their top 3 choices among the candidate technologies (Majority Voting scheme) ERD/ERM WG members present in the July 12 Workshop & the July 13 FxF meeting will be eligible to vote at July 13 meeting, based on their personal technical judgment, independent of their corporate affiliation or regional representation, Only 0 or 1 vote can be cast for any candidate technology Member does not have to use all 3 votes, but cannot use more than 3 votes. All members can participate in the straw vote. The Candidate Technologies will be ordered according to which received the largest number of votes. Consensus approval will be our goal, but a 75% affirmative vote will be required as a minimum. This is what is meant by the term approximate consensus.

13. 2008 ERD/ERM Workshops Co-sponsored by the National Science Foundation

14. Candidate Technologies for Information Processing

15. Nano-electro Mechanical Switches Collective Spin Devices Spin Transfer Torque Devices Atomic/Electrochemical Metallization Switch Carbon-based Nanoelectronics Single Electron Transistors CMOL / Field Programmable Nanowire Interconnect (FPNI) Emerging Research DeviceTechnology Candidates Evaluated

16. End of the Road map:Quest for Beyond Si CMOS Era

17. Atomic orbital sp2 0D 1D 2D 3D Graphene Carbon Nanotubes Fullerenes (C60) Graphite p s SP2 Carbon: 0-Dimension to 3-Dimension

18. Graphene quantum dot Band gap engineered Graphene nanoribbons FET (Manchester group) Nonconventional Devices Graphene Veselago lense Graphene psedospintronics Graphene Spintronics Son et al.Nature (07) Cheianov et al.Science (07) Trauzettel et al.Nature Phys. (07) Graphene Electronics: Conventional & Non-conventional Conventional Devices

19. Isd (mA) -1.2 -0.8 -0.4 0 Vsd (V) Schottky barrier switching Ph. Avouris et al, Nature Nanotechnology 2, 605 (2007) Nanotube FET Band gap: 0.5 – 1 eV On-off ratio: ~ 106 Mobility: ~ 100,000 cm2/Vsec @RT Ballistic @RT ~ 300-500 nm Fermi velocity: 106 m/sec Max current density > 109 A/cm2 Philip Kim – Columbia Univ.

20. E hole Energy kx' ky' electron ky kx Graphene : Dirac Particles in 2-dimension Band structure of graphene (Wallace 1947) Zero effective mass particles moving with a constant speed vF Philip Kim – Columbia Univ.

21. Conductivity and mobility: Role of Disorder • Minimum carrier density is finite (n0); puddles of electrons (holes) • Conductivity has a finite minimum • nimp– impurity concentration e.g. at the graphene/SiO2 interface • , n0 0.5  nimp(low nimp)– 0.2nimp(high nimp) Adam, Hwang, Galitski, Das Sarma, Proc. Nat. Acad. Sci. (2008) SEYOUNG KIM - UT AUSTIN

22. 7 5 G (e2/h) VLG = -10 V 3 1 -50 -25 0 25 50 VBG (V) We expect two Dirac minima! Graphene bipolar heterojunctions LG VLG VSD LG CLG S D EL EL CBG GLs GLs VBG 1 mm Local Gate Region -Density in GLs can be n or p type -Density in LGR can be n’ or p’ type Oezyilmaz, Jarrilo-Herrero and Kim PRL (2007) Related work by Huard et al. PRL (2007)

23. G (e2/h) 50 2 4 6 8 10 12 25 potential x VBG (V) 0 n-p’-n n-n’-n 1 mm -25 -50 potential p-p’-p p-n’-p x 10 -10 -5 0 5 VLG (V) 7 potential x 5 G (e2/h) n p p n n p p’ n p p n’ n 3 potential 1 x -50 -25 0 25 50 VBG (V) Graphene heterojunction Devices p p n’

24. Dirac Particle Confinement Graphene Gold electrode W W 1 mm 10 nm < W < 100 nm x y Graphene nanoribbon theory partial list W Zigzag ribbons Egap~ hvF Dk ~ hvF/W Graphene Nanoribbons: Confined Dirac Particles

25. Carbon-based Nanoelectronics Bandgap vs. Ribbon Width Philip Kim – Columbia Univ.

26. Carbon-based Nanoelectronics

27. Carbon-based Nanoelectronics

28. For scaled CMOS, potentially can .. Impact geometric scaling by providing an alternate MOSFET structure, and Provide a high mobility, high carrier velocity, MOSFET channel replacement material. AdvantagesCarbon-based Nanoelectronics --- For a new information process technology, potentially can … • Leverage R & D for CMOS (above) to … • Provide a technology platform enabling a new “Beyond CMOS” information processing paradigm

29. The intent of this recommendation is to highlight Carbon-based Nanoelectronics for additional roadmapping and investment --- Carbon-based Nanoelectronics while sustaining exploration of other candidate approaches for “Beyond CMOS” information processing technology.

30. International Emerging Research Devices (ERD) Work Group Emerging Research Device Work Groups Korea ERD WG US ERD WG Japan ERD WG European ERD WG

31. Prepared for the 2009 ERD Chapter re-write Conducting six workshops in collaboration with NSF, SRC, and ERM (Five accomplished) Evaluate technology entries for 2009 Respond to IRC request (see next bullet) Responded to IRC request to identify one or more Beyond CMOS technologies for roadmapping and enhanced investment Conducted in-depth evaluation of seven Beyond CMOS technologies (including one device architecture) Recommended Carbon-based Nanoelectronics to IRC Summary