Behavior of C-V Curves in MOS System

1. EE 5340Semiconductor Device TheoryLecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc

2. Table 8.4 (p. 398 M&K 3rd edition) Charge Conditions in the MOS System

3. Figure 8.11 (p. 399 M&K 3rd edition)General behavior of C-V curves of an ideal MOS system under different dc bias and ac small-signal conditions. The low-frequency (LF) C-V curve corresponding to the simplified model is shown as a dashed line.

4. Figure 8.12 (p. 401 M&K 3rd edition) MOS C-V measurement system. The voltmeter and ammeter measure both the magnitude and phase of the voltage across the diode and the current through it.

5. Figure 8.14a & b (p. 404 M&K 3rd edition) The effects of a fixed oxide-charge density Qox on the MOS system. (a) Charge configuration at zero bias: Qox = Qs + QG; (b) charge at flat band: Qox = QG.

6. Figure 8.15 (p. 405 M&K 3rd edition) Fixed charge in the oxide causes the capacitance-voltage curve to translate along the VG axis without distortion (dashed curve); charge that is influenced by the gate voltage causes distortion (dotted curve).

7. Figure 8.16 (p. 406 M&K 3rd edition)(a) Four categories of oxide charge in the MOS system. The symbols for the charge densities Q (C cm-2), and state densities N (states cm-2) or D (states cm-2 eV-1) have been standardized [4]. (b) Energy levels at the oxide-silicon interface. The interface trapping levels are distributed with density Dit (states cm-2 eV-1) within the forbidden-gap energies.

8. Effect of Q’ss onthe C-V relationship Fig 10.29*

9. Fully biased n-MOScapacitor VG Channel if VG > VT VS VD EOx,x> 0 e- e- e- e- e- e- n+ n+ p-substrate Vsub=VB Depl Reg Acceptors y 0 L

10. MOS energy bands atSi surface for n-channel Fig 8.10**

11. n-substrate inversion(p-channel) Fig 10.7*

12. Ex Emax x Computing the D.R. W and Q at O.S.I.

13. Q’d,max and xd,max forbiased MOS capacitor Fig 8.11** xd,max (mm)

14. Fully biased n-channel VT calc

15. n-channel VT forVC = VB = 0 Fig 10.20*

16. Fully biased p-channel VT calc

17. p-channel VT forVC = VB = 0 Fig 10.21*

18. Equations forVT calculation

19. n-channel enhancementMOSFET in ohmic region 0< VT< VG Channel VS = 0 0< VD< VDS,sat EOx,x> 0 e-e- e- e- e- n+ n+ Depl Reg p-substrate Acceptors VB < 0

20. Conductance ofinverted channel • Q’n = - C’Ox(VGC-VT) • n’s = C’Ox(VGC-VT)/q, (# inv elect/cm2) • The conductivity sn = (n’s/t) q mn • G = sn(Wt/L) = n’s q mn (W/L) = 1/R, so • I = V/R = dV/dR, dR = dL/(n’sqmnW)

21. Basic I-V relationfor MOS channel

22. I-V relation for n-MOS (ohmic reg) ohmic ID non-physical ID,sat saturated VDS VDS,sat

23. Universal draincharacteristic ID VGS=VT+3V 9ID1 ohmic saturated, VDS>VGS-VT VGS=VT+2V 4ID1 VGS=VT+1V ID1 VDS

24. Characterizing then-ch MOSFET VD ID D G B S VGS VT

25. Substrate bias effect on VT (body-effect)

26. Body effect data Fig 9.9**

27. Low field ohmiccharacteristics

28. MOSFET circuitparameters

29. MOSFET circuitparameters (cont)

30. MOSFET equivalentcircuit elements Fig 10.51*

31. MOS small-signal equivalent circuit Fig 10.52*

32. MOS channel-length modulation Fig 11.5*

33. Analysis of channellength modulation

34. Channel length mod-ulated drain char Fig 11.6*

35. References * Semiconductor Physics & Devices, by Donald A. Neamen, Irwin, Chicago, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986